mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-26 07:29:55 +00:00
This enables targets to adapt their pass pipeline to the register allocator in use. For example, with the AArch64 backend, using PBQP with the cortex-a57, the FPLoadBalancing pass is no longer necessary. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220321 91177308-0d34-0410-b5e6-96231b3b80d8
15 lines
322 B
LLVM
15 lines
322 B
LLVM
; RUN: llc -mtriple=aarch64-linux-gnu -mcpu=cortex-a57 -regalloc=pbqp -pbqp-coalescing -o - %s | FileCheck %s
|
|
|
|
define i32 @foo(i32 %a) {
|
|
; CHECK-LABEL: foo:
|
|
; CHECK: bl bar
|
|
; CHECK: bl baz
|
|
%call = call i32 @bar(i32 %a)
|
|
%call1 = call i32 @baz(i32 %call)
|
|
ret i32 %call1
|
|
}
|
|
|
|
declare i32 @bar(i32)
|
|
declare i32 @baz(i32)
|
|
|