mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
6099306cec
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209200 91177308-0d34-0410-b5e6-96231b3b80d8
108 lines
2.7 KiB
ArmAsm
108 lines
2.7 KiB
ArmAsm
// RUN: llvm-mc -triple=armeb-eabi -mattr v7,vfp2 -filetype=obj < %s | llvm-objdump -s - | FileCheck %s
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.syntax unified
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.text
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.align 2
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.code 32
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@ARM::fixup_arm_condbl
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.section s_condbl,"ax",%progbits
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// CHECK-LABEL: Contents of section s_condbl
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// CHECK: 0000 0b000002
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bleq condbl_label+16
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condbl_label:
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@ARM::fixup_arm_uncondbl
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.section s_uncondbl,"ax",%progbits
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// CHECK-LABEL: Contents of section s_uncondbl
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// CHECK: 0000 eb000002
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bl uncond_label+16
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uncond_label:
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@ARM::fixup_arm_blx
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.section s_blx,"ax",%progbits
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// CHECK-LABEL: Contents of section s_blx
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// CHECK: 0000 fa000002
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blx blx_label+16
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blx_label:
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@ARM::fixup_arm_uncondbranch
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.section s_uncondbranch,"ax",%progbits
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// CHECK-LABEL: Contents of section s_uncondbranch
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// CHECK: 0000 ea000003
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b uncondbranch_label+16
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uncondbranch_label:
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@ARM::fixup_arm_condbranch
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.section s_condbranch,"ax",%progbits
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// CHECK-LABEL: Contents of section s_condbranch
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// CHECK: 0000 0a000003
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beq condbranch_label+16
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condbranch_label:
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@ARM::fixup_arm_pcrel_10
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.section s_arm_pcrel_10,"ax",%progbits
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// CHECK-LABEL: Contents of section s_arm_pcrel_10
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// CHECK: 0000 ed9f0b03
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vldr d0, arm_pcrel_10_label+16
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arm_pcrel_10_label:
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@ARM::fixup_arm_ldst_pcrel_12
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.section s_arm_ldst_pcrel_12,"ax",%progbits
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// CHECK-LABEL: Contents of section s_arm_ldst_pcrel_12
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// CHECK: 0000 e59f000c
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ldr r0, arm_ldst_pcrel_12_label+16
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arm_ldst_pcrel_12_label:
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@ARM::fixup_arm_adr_pcrel_12
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.section s_arm_adr_pcrel_12,"ax",%progbits
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// CHECK-LABEL: Contents of section s_arm_adr_pcrel_12
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// CHECK: 0000 e28f0010
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adr r0, arm_adr_pcrel_12_label+20
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arm_adr_pcrel_12_label:
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@ARM::fixup_arm_adr_pcrel_10_unscaled
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.section s_arm_adr_pcrel_10_unscaled,"ax",%progbits
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// CHECK-LABEL: Contents of section s_arm_adr_pcrel_10_unscaled
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// CHECK: 0000 e1cf01d4
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ldrd r0, r1, arm_adr_pcrel_10_unscaled_label+24
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arm_adr_pcrel_10_unscaled_label:
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@ARM::fixup_arm_movw_lo16
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.section s_movw,"ax",%progbits
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// CHECK-LABEL: Contents of section s_movw
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// CHECK: 0000 e3000008
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movw r0, :lower16:(some_label+8)
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@ARM::fixup_arm_movt_hi16
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.section s_movt,"ax",%progbits
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// CHECK-LABEL: Contents of section s_movt
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// CHECK: 0000 e34f0ffc
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movt r0, :upper16:GOT-(movt_label)
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movt_label:
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@FK_Data_1
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.section s_fk_data_1
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// CHECK-LABEL: Contents of section s_fk_data_1
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// CHECK: 0000 01
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fk_data1_l_label:
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.byte fk_data1_h_label-fk_data1_l_label
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fk_data1_h_label:
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@FK_Data_2
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.section s_fk_data_2
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// CHECK-LABEL: Contents of section s_fk_data_2
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// CHECK: 0000 0002
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fk_data2_l_label:
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.short fk_data2_h_label-fk_data2_l_label
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fk_data2_h_label:
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@FK_Data_4
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.section s_fk_data_4
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// CHECK-LABEL: Contents of section s_fk_data_4
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// CHECK: 0000 00000004
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fk_data4_l_label:
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.long fk_data4_h_label-fk_data4_l_label
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fk_data4_h_label:
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