llvm-6502/test/CodeGen/ARM/2009-10-30.ll
Johnny Chen 9e08876a2a Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@98745 91177308-0d34-0410-b5e6-96231b3b80d8
2010-03-17 17:52:21 +00:00

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514 B
LLVM

; RUN: llc < %s -mtriple=arm-linux-gnueabi | FileCheck %s
; This test checks that the address of the varg arguments is correctly
; computed when there are 5 or more regular arguments.
define void @f(i32 %a1, i32 %a2, i32 %a3, i32 %a4, i32 %a5, ...) {
entry:
;CHECK: sub sp, sp, #4
;CHECK: add r{{[0-9]+}}, sp, #8
;CHECK: str r{{[0-9]+}}, [sp], #4
;CHECK: bx lr
%ap = alloca i8*, align 4
%ap1 = bitcast i8** %ap to i8*
call void @llvm.va_start(i8* %ap1)
ret void
}
declare void @llvm.va_start(i8*) nounwind