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https://github.com/c64scene-ar/llvm-6502.git
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7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
138 lines
5.0 KiB
LLVM
138 lines
5.0 KiB
LLVM
; RUN: opt < %s -scalarrepl -S | FileCheck %s
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target datalayout = "E-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64"
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target triple = "x86_64-apple-darwin10.0.0"
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define void @test1(<4 x float>* %F, float %f) {
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entry:
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%G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3]
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%tmp = load <4 x float>, <4 x float>* %F ; <<4 x float>> [#uses=2]
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%tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp3, <4 x float>* %G
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%G.upgrd.1 = getelementptr <4 x float>, <4 x float>* %G, i32 0, i32 0 ; <float*> [#uses=1]
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store float %f, float* %G.upgrd.1
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%tmp4 = load <4 x float>, <4 x float>* %G ; <<4 x float>> [#uses=2]
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%tmp6 = fadd <4 x float> %tmp4, %tmp4 ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp6, <4 x float>* %F
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ret void
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; CHECK-LABEL: @test1(
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; CHECK-NOT: alloca
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; CHECK: %tmp = load <4 x float>, <4 x float>* %F
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; CHECK: fadd <4 x float> %tmp, %tmp
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; CHECK-NEXT: insertelement <4 x float> %tmp3, float %f, i32 0
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}
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define void @test2(<4 x float>* %F, float %f) {
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entry:
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%G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=3]
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%tmp = load <4 x float>, <4 x float>* %F ; <<4 x float>> [#uses=2]
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%tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp3, <4 x float>* %G
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%tmp.upgrd.2 = getelementptr <4 x float>, <4 x float>* %G, i32 0, i32 2 ; <float*> [#uses=1]
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store float %f, float* %tmp.upgrd.2
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%tmp4 = load <4 x float>, <4 x float>* %G ; <<4 x float>> [#uses=2]
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%tmp6 = fadd <4 x float> %tmp4, %tmp4 ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp6, <4 x float>* %F
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ret void
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; CHECK-LABEL: @test2(
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; CHECK-NOT: alloca
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; CHECK: %tmp = load <4 x float>, <4 x float>* %F
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; CHECK: fadd <4 x float> %tmp, %tmp
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; CHECK-NEXT: insertelement <4 x float> %tmp3, float %f, i32 2
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}
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define void @test3(<4 x float>* %F, float* %f) {
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entry:
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%G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2]
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%tmp = load <4 x float>, <4 x float>* %F ; <<4 x float>> [#uses=2]
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%tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp3, <4 x float>* %G
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%tmp.upgrd.3 = getelementptr <4 x float>, <4 x float>* %G, i32 0, i32 2 ; <float*> [#uses=1]
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%tmp.upgrd.4 = load float, float* %tmp.upgrd.3 ; <float> [#uses=1]
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store float %tmp.upgrd.4, float* %f
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ret void
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; CHECK-LABEL: @test3(
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; CHECK-NOT: alloca
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; CHECK: %tmp = load <4 x float>, <4 x float>* %F
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; CHECK: fadd <4 x float> %tmp, %tmp
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; CHECK-NEXT: extractelement <4 x float> %tmp3, i32 2
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}
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define void @test4(<4 x float>* %F, float* %f) {
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entry:
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%G = alloca <4 x float>, align 16 ; <<4 x float>*> [#uses=2]
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%tmp = load <4 x float>, <4 x float>* %F ; <<4 x float>> [#uses=2]
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%tmp3 = fadd <4 x float> %tmp, %tmp ; <<4 x float>> [#uses=1]
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store <4 x float> %tmp3, <4 x float>* %G
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%G.upgrd.5 = getelementptr <4 x float>, <4 x float>* %G, i32 0, i32 0 ; <float*> [#uses=1]
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%tmp.upgrd.6 = load float, float* %G.upgrd.5 ; <float> [#uses=1]
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store float %tmp.upgrd.6, float* %f
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ret void
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; CHECK-LABEL: @test4(
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; CHECK-NOT: alloca
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; CHECK: %tmp = load <4 x float>, <4 x float>* %F
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; CHECK: fadd <4 x float> %tmp, %tmp
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; CHECK-NEXT: extractelement <4 x float> %tmp3, i32 0
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}
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define i32 @test5(float %X) { ;; should turn into bitcast.
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%X_addr = alloca [4 x float]
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%X1 = getelementptr [4 x float], [4 x float]* %X_addr, i32 0, i32 2
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store float %X, float* %X1
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%a = bitcast float* %X1 to i32*
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%tmp = load i32, i32* %a
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ret i32 %tmp
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; CHECK-LABEL: @test5(
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; CHECK-NEXT: bitcast float %X to i32
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; CHECK-NEXT: ret i32
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}
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define i64 @test6(<2 x float> %X) {
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%X_addr = alloca <2 x float>
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store <2 x float> %X, <2 x float>* %X_addr
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%P = bitcast <2 x float>* %X_addr to i64*
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%tmp = load i64, i64* %P
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ret i64 %tmp
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; CHECK-LABEL: @test6(
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; CHECK: bitcast <2 x float> %X to i64
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; CHECK: ret i64
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}
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%struct.test7 = type { [6 x i32] }
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define void @test7() {
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entry:
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%memtmp = alloca %struct.test7, align 16
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%0 = bitcast %struct.test7* %memtmp to <4 x i32>*
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store <4 x i32> zeroinitializer, <4 x i32>* %0, align 16
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%1 = getelementptr inbounds %struct.test7, %struct.test7* %memtmp, i64 0, i32 0, i64 5
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store i32 0, i32* %1, align 4
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ret void
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; CHECK-LABEL: @test7(
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; CHECK-NOT: alloca
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; CHECK: and i192
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}
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; When promoting an alloca to a 1-element vector type, instructions that
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; produce that same vector type should not be changed to insert one element
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; into a new vector. <rdar://problem/14249078>
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define <1 x i64> @test8(<1 x i64> %a) {
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entry:
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%a.addr = alloca <1 x i64>, align 8
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%__a = alloca <1 x i64>, align 8
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%tmp = alloca <1 x i64>, align 8
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store <1 x i64> %a, <1 x i64>* %a.addr, align 8
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%0 = load <1 x i64>, <1 x i64>* %a.addr, align 8
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store <1 x i64> %0, <1 x i64>* %__a, align 8
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%1 = load <1 x i64>, <1 x i64>* %__a, align 8
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%2 = bitcast <1 x i64> %1 to <8 x i8>
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%3 = bitcast <8 x i8> %2 to <1 x i64>
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%vshl_n = shl <1 x i64> %3, <i64 4>
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store <1 x i64> %vshl_n, <1 x i64>* %tmp
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%4 = load <1 x i64>, <1 x i64>* %tmp
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ret <1 x i64> %4
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; CHECK-LABEL: @test8(
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; CHECK-NOT: alloca
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; CHECK-NOT: insertelement
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; CHECK: ret <1 x i64>
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}
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