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https://github.com/c64scene-ar/llvm-6502.git
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08a9a985dc
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@28633 91177308-0d34-0410-b5e6-96231b3b80d8
236 lines
8.9 KiB
C++
236 lines
8.9 KiB
C++
//===-- PPCJITInfo.cpp - Implement the JIT interfaces for the PowerPC -----===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file was developed by the LLVM research group and is distributed under
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// the University of Illinois Open Source License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file implements the JIT interfaces for the 32-bit PowerPC target.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "jit"
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#include "PPCJITInfo.h"
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#include "PPCRelocations.h"
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#include "llvm/CodeGen/MachineCodeEmitter.h"
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#include "llvm/Config/alloca.h"
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#include <set>
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using namespace llvm;
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static TargetJITInfo::JITCompilerFn JITCompilerFunction;
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#define BUILD_ADDIS(RD,RS,IMM16) \
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((15 << 26) | ((RD) << 21) | ((RS) << 16) | ((IMM16) & 65535))
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#define BUILD_ORI(RD,RS,UIMM16) \
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((24 << 26) | ((RS) << 21) | ((RD) << 16) | ((UIMM16) & 65535))
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#define BUILD_MTSPR(RS,SPR) \
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((31 << 26) | ((RS) << 21) | ((SPR) << 16) | (467 << 1))
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#define BUILD_BCCTRx(BO,BI,LINK) \
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((19 << 26) | ((BO) << 21) | ((BI) << 16) | (528 << 1) | ((LINK) & 1))
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// Pseudo-ops
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#define BUILD_LIS(RD,IMM16) BUILD_ADDIS(RD,0,IMM16)
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#define BUILD_MTCTR(RS) BUILD_MTSPR(RS,9)
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#define BUILD_BCTR(LINK) BUILD_BCCTRx(20,0,LINK)
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static void EmitBranchToAt(void *At, void *To, bool isCall) {
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intptr_t Addr = (intptr_t)To;
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// FIXME: should special case the short branch case.
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unsigned *AtI = (unsigned*)At;
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AtI[0] = BUILD_LIS(12, Addr >> 16); // lis r12, hi16(address)
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AtI[1] = BUILD_ORI(12, 12, Addr); // ori r12, r12, low16(address)
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AtI[2] = BUILD_MTCTR(12); // mtctr r12
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AtI[3] = BUILD_BCTR(isCall); // bctr/bctrl
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}
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extern "C" void PPC32CompilationCallback();
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#if defined(__POWERPC__) || defined (__ppc__) || defined(_POWER)
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// CompilationCallback stub - We can't use a C function with inline assembly in
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// it, because we the prolog/epilog inserted by GCC won't work for us. Instead,
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// write our own wrapper, which does things our way, so we have complete control
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// over register saving and restoring.
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asm(
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".text\n"
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".align 2\n"
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".globl _PPC32CompilationCallback\n"
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"_PPC32CompilationCallback:\n"
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// Make space for 8 ints r[3-10] and 13 doubles f[1-13] and the
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// FIXME: need to save v[0-19] for altivec?
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// Set up a proper stack frame
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"stwu r1, -208(r1)\n"
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"mflr r0\n"
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"stw r0, 216(r1)\n"
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// Save all int arg registers
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"stw r10, 204(r1)\n" "stw r9, 200(r1)\n"
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"stw r8, 196(r1)\n" "stw r7, 192(r1)\n"
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"stw r6, 188(r1)\n" "stw r5, 184(r1)\n"
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"stw r4, 180(r1)\n" "stw r3, 176(r1)\n"
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// Save all call-clobbered FP regs.
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"stfd f13, 168(r1)\n" "stfd f12, 160(r1)\n"
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"stfd f11, 152(r1)\n" "stfd f10, 144(r1)\n"
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"stfd f9, 136(r1)\n" "stfd f8, 128(r1)\n"
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"stfd f7, 120(r1)\n" "stfd f6, 112(r1)\n"
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"stfd f5, 104(r1)\n" "stfd f4, 96(r1)\n"
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"stfd f3, 88(r1)\n" "stfd f2, 80(r1)\n"
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"stfd f1, 72(r1)\n"
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// Arguments to Compilation Callback:
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// r3 - our lr (address of the call instruction in stub plus 4)
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// r4 - stub's lr (address of instruction that called the stub plus 4)
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"mr r3, r0\n"
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"lwz r2, 208(r1)\n" // stub's frame
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"lwz r4, 8(r2)\n" // stub's lr
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"bl _PPC32CompilationCallbackC\n"
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"mtctr r3\n"
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// Restore all int arg registers
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"lwz r10, 204(r1)\n" "lwz r9, 200(r1)\n"
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"lwz r8, 196(r1)\n" "lwz r7, 192(r1)\n"
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"lwz r6, 188(r1)\n" "lwz r5, 184(r1)\n"
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"lwz r4, 180(r1)\n" "lwz r3, 176(r1)\n"
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// Restore all FP arg registers
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"lfd f13, 168(r1)\n" "lfd f12, 160(r1)\n"
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"lfd f11, 152(r1)\n" "lfd f10, 144(r1)\n"
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"lfd f9, 136(r1)\n" "lfd f8, 128(r1)\n"
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"lfd f7, 120(r1)\n" "lfd f6, 112(r1)\n"
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"lfd f5, 104(r1)\n" "lfd f4, 96(r1)\n"
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"lfd f3, 88(r1)\n" "lfd f2, 80(r1)\n"
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"lfd f1, 72(r1)\n"
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// Pop 3 frames off the stack and branch to target
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"lwz r1, 208(r1)\n"
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"lwz r2, 8(r1)\n"
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"mtlr r2\n"
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"bctr\n"
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);
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#else
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void PPC32CompilationCallback() {
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assert(0 && "This is not a power pc, you can't execute this!");
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abort();
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}
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#endif
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extern "C" unsigned *PPC32CompilationCallbackC(unsigned *StubCallAddrPlus4,
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unsigned *OrigCallAddrPlus4) {
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// Adjust the pointer to the address of the call instruction in the stub
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// emitted by emitFunctionStub, rather than the instruction after it.
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unsigned *StubCallAddr = StubCallAddrPlus4 - 1;
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unsigned *OrigCallAddr = OrigCallAddrPlus4 - 1;
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void *Target = JITCompilerFunction(StubCallAddr);
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// Check to see if *OrigCallAddr is a 'bl' instruction, and if we can rewrite
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// it to branch directly to the destination. If so, rewrite it so it does not
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// need to go through the stub anymore.
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unsigned OrigCallInst = *OrigCallAddr;
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if ((OrigCallInst >> 26) == 18) { // Direct call.
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intptr_t Offset = ((intptr_t)Target - (intptr_t)OrigCallAddr) >> 2;
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if (Offset >= -(1 << 23) && Offset < (1 << 23)) { // In range?
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// Clear the original target out.
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OrigCallInst &= (63 << 26) | 3;
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// Fill in the new target.
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OrigCallInst |= (Offset & ((1 << 24)-1)) << 2;
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// Replace the call.
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*OrigCallAddr = OrigCallInst;
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}
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}
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// Assert that we are coming from a stub that was created with our
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// emitFunctionStub.
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assert((*StubCallAddr >> 26) == 19 && "Call in stub is not indirect!");
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StubCallAddr -= 6;
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// Rewrite the stub with an unconditional branch to the target, for any users
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// who took the address of the stub.
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EmitBranchToAt(StubCallAddr, Target, false);
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// Put the address of the target function to call and the address to return to
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// after calling the target function in a place that is easy to get on the
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// stack after we restore all regs.
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return (unsigned *)Target;
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}
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TargetJITInfo::LazyResolverFn
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PPCJITInfo::getLazyResolverFunction(JITCompilerFn Fn) {
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JITCompilerFunction = Fn;
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return PPC32CompilationCallback;
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}
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void *PPCJITInfo::emitFunctionStub(void *Fn, MachineCodeEmitter &MCE) {
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// If this is just a call to an external function, emit a branch instead of a
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// call. The code is the same except for one bit of the last instruction.
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if (Fn != (void*)(intptr_t)PPC32CompilationCallback) {
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MCE.startFunctionStub(4*4);
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void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
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MCE.emitWordBE(0);
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MCE.emitWordBE(0);
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MCE.emitWordBE(0);
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MCE.emitWordBE(0);
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EmitBranchToAt(Addr, Fn, false);
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return MCE.finishFunctionStub(0);
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}
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MCE.startFunctionStub(4*7);
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MCE.emitWordBE(0x9421ffe0); // stwu r1,-32(r1)
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MCE.emitWordBE(0x7d6802a6); // mflr r11
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MCE.emitWordBE(0x91610028); // stw r11, 40(r1)
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void *Addr = (void*)(intptr_t)MCE.getCurrentPCValue();
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MCE.emitWordBE(0);
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MCE.emitWordBE(0);
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MCE.emitWordBE(0);
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MCE.emitWordBE(0);
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EmitBranchToAt(Addr, Fn, true/*is call*/);
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return MCE.finishFunctionStub(0);
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}
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void PPCJITInfo::relocate(void *Function, MachineRelocation *MR,
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unsigned NumRelocs, unsigned char* GOTBase) {
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for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
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unsigned *RelocPos = (unsigned*)Function + MR->getMachineCodeOffset()/4;
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intptr_t ResultPtr = (intptr_t)MR->getResultPointer();
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switch ((PPC::RelocationType)MR->getRelocationType()) {
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default: assert(0 && "Unknown relocation type!");
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case PPC::reloc_pcrel_bx:
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// PC-relative relocation for b and bl instructions.
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ResultPtr = (ResultPtr-(intptr_t)RelocPos) >> 2;
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assert(ResultPtr >= -(1 << 23) && ResultPtr < (1 << 23) &&
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"Relocation out of range!");
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*RelocPos |= (ResultPtr & ((1 << 24)-1)) << 2;
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break;
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case PPC::reloc_absolute_ptr_high: // Pointer relocations.
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case PPC::reloc_absolute_ptr_low:
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case PPC::reloc_absolute_high: // high bits of ref -> low 16 of instr
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case PPC::reloc_absolute_low: // low bits of ref -> low 16 of instr
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ResultPtr += MR->getConstantVal();
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// If this is a high-part access, get the high-part.
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if (MR->getRelocationType() == PPC::reloc_absolute_high ||
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MR->getRelocationType() == PPC::reloc_absolute_ptr_high) {
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// If the low part will have a carry (really a borrow) from the low
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// 16-bits into the high 16, add a bit to borrow from.
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if (((int)ResultPtr << 16) < 0)
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ResultPtr += 1 << 16;
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ResultPtr >>= 16;
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}
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// Do the addition then mask, so the addition does not overflow the 16-bit
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// immediate section of the instruction.
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unsigned LowBits = (*RelocPos + ResultPtr) & 65535;
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unsigned HighBits = *RelocPos & ~65535;
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*RelocPos = LowBits | HighBits; // Slam into low 16-bits
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break;
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}
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}
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}
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void PPCJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
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EmitBranchToAt(Old, New, false);
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}
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