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https://github.com/c64scene-ar/llvm-6502.git
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7bc8414ee9
Only Linux is supported at the moment, and other platforms quickly fault. As a result these tests would fail on non-Linux hosts. It may be worth making the tests more generic again as more platforms are supported. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174170 91177308-0d34-0410-b5e6-96231b3b80d8
95 lines
2.6 KiB
LLVM
95 lines
2.6 KiB
LLVM
; RUN: llc -verify-machineinstrs < %s -mtriple=aarch64-none-linux-gnu -tailcallopt | FileCheck %s
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declare fastcc void @callee_stack0()
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declare fastcc void @callee_stack8([8 x i32], i64)
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declare fastcc void @callee_stack16([8 x i32], i64, i64)
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define fastcc void @caller_to0_from0() nounwind {
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; CHECK: caller_to0_from0:
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; CHECK-NEXT: // BB
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tail call fastcc void @callee_stack0()
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ret void
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; CHECK-NEXT: b callee_stack0
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}
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define fastcc void @caller_to0_from8([8 x i32], i64) {
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; CHECK: caller_to0_from8:
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tail call fastcc void @callee_stack0()
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ret void
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; CHECK: add sp, sp, #16
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; CHECK-NEXT: b callee_stack0
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}
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define fastcc void @caller_to8_from0() {
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; CHECK: caller_to8_from0:
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; CHECK: sub sp, sp, #32
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; Key point is that the "42" should go #16 below incoming stack
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; pointer (we didn't have arg space to reuse).
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tail call fastcc void @callee_stack8([8 x i32] undef, i64 42)
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ret void
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; CHECK: str {{x[0-9]+}}, [sp, #16]
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; CHECK-NEXT: add sp, sp, #16
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; CHECK-NEXT: b callee_stack8
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}
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define fastcc void @caller_to8_from8([8 x i32], i64 %a) {
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; CHECK: caller_to8_from8:
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; CHECK: sub sp, sp, #16
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; Key point is that the "%a" should go where at SP on entry.
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tail call fastcc void @callee_stack8([8 x i32] undef, i64 42)
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ret void
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; CHECK: str {{x[0-9]+}}, [sp, #16]
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; CHECK-NEXT: add sp, sp, #16
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; CHECK-NEXT: b callee_stack8
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}
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define fastcc void @caller_to16_from8([8 x i32], i64 %a) {
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; CHECK: caller_to16_from8:
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; CHECK: sub sp, sp, #16
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; Important point is that the call reuses the "dead" argument space
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; above %a on the stack. If it tries to go below incoming-SP then the
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; callee will not deallocate the space, even in fastcc.
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tail call fastcc void @callee_stack16([8 x i32] undef, i64 42, i64 2)
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; CHECK: str {{x[0-9]+}}, [sp, #24]
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; CHECK: str {{x[0-9]+}}, [sp, #16]
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; CHECK: add sp, sp, #16
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; CHECK: b callee_stack16
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ret void
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}
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define fastcc void @caller_to8_from24([8 x i32], i64 %a, i64 %b, i64 %c) {
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; CHECK: caller_to8_from24:
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; CHECK: sub sp, sp, #16
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; Key point is that the "%a" should go where at #16 above SP on entry.
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tail call fastcc void @callee_stack8([8 x i32] undef, i64 42)
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ret void
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; CHECK: str {{x[0-9]+}}, [sp, #32]
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; CHECK-NEXT: add sp, sp, #32
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; CHECK-NEXT: b callee_stack8
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}
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define fastcc void @caller_to16_from16([8 x i32], i64 %a, i64 %b) {
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; CHECK: caller_to16_from16:
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; CHECK: sub sp, sp, #16
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; Here we want to make sure that both loads happen before the stores:
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; otherwise either %a or %b will be wrongly clobbered.
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tail call fastcc void @callee_stack16([8 x i32] undef, i64 %b, i64 %a)
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ret void
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; CHECK: ldr x0,
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; CHECK: ldr x1,
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; CHECK: str x1,
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; CHECK: str x0,
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; CHECK: add sp, sp, #16
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; CHECK: b callee_stack16
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}
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