llvm-6502/test/CodeGen
Jakob Stoklund Olesen 6b74e505be Also attempt trivial coalescing for live intervals that end in a copy.
The coalescer is supposed to clean these up, but when setting up parameters
for a function call, there may be copies to physregs. If the defining
instruction has been LICM'ed far away, the coalescer won't touch it.

The register allocation hint does not always work - when the register
allocator is backtracking, it clears the hints.

This patch takes care of a few more cases that r90163 missed.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@90502 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-04 00:16:04 +00:00
..
Alpha
ARM Recognize canonical forms of vector shuffles where the same vector is used for 2009-12-03 06:40:55 +00:00
Blackfin
CBackend
CellSPU
CPP
Generic While this test is testing a problem in the generic part of codegen, 2009-11-27 16:04:14 +00:00
Mips Support PIC loading of constant pool entries 2009-11-25 12:17:58 +00:00
MSP430 While this test is testing a problem in the generic part of codegen, 2009-11-27 16:04:14 +00:00
PIC16 While this test is testing a problem in the generic part of codegen, 2009-11-27 16:04:14 +00:00
PowerPC ProcessImplicitDefs should watch out for invalidated iterator and extra implicit operands on copies. 2009-11-25 21:13:39 +00:00
SPARC
SystemZ
Thumb More consistent thumb1 asm printing. 2009-11-19 06:57:41 +00:00
Thumb2 test case for IV-Users simplification loop improvement 2009-12-01 21:53:51 +00:00
X86 Also attempt trivial coalescing for live intervals that end in a copy. 2009-12-04 00:16:04 +00:00
XCore Add XCore support for indirectbr / blockaddress. 2009-11-18 23:20:42 +00:00