llvm-6502/test/MC/Disassembler
Nemanja Ivanovic 8493722975 Add support for VSX FMA single-precision instructions to the PPC back end
This patch corresponds to review:
http://reviews.llvm.org/D9941

It adds the various FMA instructions introduced in the version 2.07 of
the ISA along with the testing for them. These are operations on single
precision scalar values in VSX registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@238578 91177308-0d34-0410-b5e6-96231b3b80d8
2015-05-29 17:13:25 +00:00
..
AArch64 AArch64: add BFC alias for the BFI/BFM instructions. 2015-04-30 18:28:58 +00:00
ARM [ARM] Add v8.1a "Privileged Access Never" extension 2015-04-16 11:34:25 +00:00
Hexagon [Hexagon] Adding missing vector multiply instruction encodings. Converting multiply intrinsics and updating tests. 2015-02-03 19:15:11 +00:00
Mips [mips][microMIPSr6] Implement SEB and SEH instructions 2015-05-27 15:39:47 +00:00
PowerPC Add support for VSX FMA single-precision instructions to the PPC back end 2015-05-29 17:13:25 +00:00
Sparc Sparc: Support PSR, TBR, WIM read/write instructions. 2015-05-18 16:38:47 +00:00
SystemZ [SystemZ] Add z13 vector facility and MC support 2015-05-05 19:23:40 +00:00
X86 [X86] Fix PR23271 - RIP-relative decoding bug in disassembler. 2015-05-13 22:44:52 +00:00
XCore Reduce verbiage of lit.local.cfg files 2014-06-09 22:42:55 +00:00