llvm-6502/test/MC
David Sehr f2a1c83c86 Correct ARM NOP encoding
The encoding of NOP in ARMAsmBackend.cpp is missing a trailing zero, which
causes the emission of a coprocessor instruction rather than "mov r0, r0"
as indicated in the comment.  The test also checks for the wrong encoding.

http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20121203/157919.html



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@169420 91177308-0d34-0410-b5e6-96231b3b80d8
2012-12-05 21:01:27 +00:00
..
ARM
AsmParser
COFF
Disassembler Added a option to the disassembler to print immediates as hex. 2012-12-05 18:13:19 +00:00
ELF
MachO Correct ARM NOP encoding 2012-12-05 21:01:27 +00:00
Markup
MBlaze
Mips
PowerPC
X86