mirror of
https://github.com/c64scene-ar/llvm-6502.git
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8287a4b564
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@220304 91177308-0d34-0410-b5e6-96231b3b80d8
115 lines
4.0 KiB
LLVM
115 lines
4.0 KiB
LLVM
; RUN: llc -march=r600 -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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declare i32 @llvm.bswap.i32(i32) nounwind readnone
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declare <2 x i32> @llvm.bswap.v2i32(<2 x i32>) nounwind readnone
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declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) nounwind readnone
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declare <8 x i32> @llvm.bswap.v8i32(<8 x i32>) nounwind readnone
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declare i64 @llvm.bswap.i64(i64) nounwind readnone
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declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>) nounwind readnone
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declare <4 x i64> @llvm.bswap.v4i64(<4 x i64>) nounwind readnone
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; FUNC-LABEL: @test_bswap_i32
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; SI: BUFFER_LOAD_DWORD [[VAL:v[0-9]+]]
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; SI-DAG: V_ALIGNBIT_B32 [[TMP0:v[0-9]+]], [[VAL]], [[VAL]], 8
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; SI-DAG: V_ALIGNBIT_B32 [[TMP1:v[0-9]+]], [[VAL]], [[VAL]], 24
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; SI-DAG: S_MOV_B32 [[K:s[0-9]+]], 0xff00ff
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; SI: V_BFI_B32 [[RESULT:v[0-9]+]], [[K]], [[TMP1]], [[TMP0]]
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; SI: BUFFER_STORE_DWORD [[RESULT]]
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; SI: S_ENDPGM
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define void @test_bswap_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
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%val = load i32 addrspace(1)* %in, align 4
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%bswap = call i32 @llvm.bswap.i32(i32 %val) nounwind readnone
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store i32 %bswap, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @test_bswap_v2i32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI: S_ENDPGM
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define void @test_bswap_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) nounwind {
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%val = load <2 x i32> addrspace(1)* %in, align 8
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%bswap = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %val) nounwind readnone
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store <2 x i32> %bswap, <2 x i32> addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: @test_bswap_v4i32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI: S_ENDPGM
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define void @test_bswap_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) nounwind {
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%val = load <4 x i32> addrspace(1)* %in, align 16
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%bswap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %val) nounwind readnone
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store <4 x i32> %bswap, <4 x i32> addrspace(1)* %out, align 16
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ret void
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}
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; FUNC-LABEL: @test_bswap_v8i32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_ALIGNBIT_B32
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; SI-DAG: V_BFI_B32
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; SI: S_ENDPGM
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define void @test_bswap_v8i32(<8 x i32> addrspace(1)* %out, <8 x i32> addrspace(1)* %in) nounwind {
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%val = load <8 x i32> addrspace(1)* %in, align 32
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%bswap = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %val) nounwind readnone
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store <8 x i32> %bswap, <8 x i32> addrspace(1)* %out, align 32
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ret void
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}
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define void @test_bswap_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) nounwind {
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%val = load i64 addrspace(1)* %in, align 8
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%bswap = call i64 @llvm.bswap.i64(i64 %val) nounwind readnone
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store i64 %bswap, i64 addrspace(1)* %out, align 8
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ret void
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}
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define void @test_bswap_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* %in) nounwind {
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%val = load <2 x i64> addrspace(1)* %in, align 16
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%bswap = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %val) nounwind readnone
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store <2 x i64> %bswap, <2 x i64> addrspace(1)* %out, align 16
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ret void
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}
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define void @test_bswap_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) nounwind {
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%val = load <4 x i64> addrspace(1)* %in, align 32
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%bswap = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %val) nounwind readnone
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store <4 x i64> %bswap, <4 x i64> addrspace(1)* %out, align 32
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ret void
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}
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