mirror of
https://github.com/c64scene-ar/llvm-6502.git
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I've no idea why I decided to handle TMxx differently from all the other high/low logic operations, but it was a stupid thing to do. The high registers aren't available as separate 32-bit registers on z10, so subreg_h32 can't be used on a GR64 there. I've normally been testing with z196 and with -O3 and so hadn't noticed this until now. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@195473 91177308-0d34-0410-b5e6-96231b3b80d8
235 lines
4.1 KiB
LLVM
235 lines
4.1 KiB
LLVM
; Test the use of TEST UNDER MASK for 64-bit operations.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z10 | FileCheck %s
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; RUN: llc < %s -mtriple=s390x-linux-gnu -mcpu=z196 | FileCheck %s
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@g = global i32 0
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; Check the lowest useful TMLL value.
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define void @f1(i64 %a) {
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; CHECK-LABEL: f1:
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; CHECK: tmll %r2, 1
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; CHECK: je {{\.L.*}}
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; CHECK: br %r14
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entry:
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%and = and i64 %a, 1
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%cmp = icmp eq i64 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check the high end of the TMLL range.
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define void @f2(i64 %a) {
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; CHECK-LABEL: f2:
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; CHECK: tmll %r2, 65535
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; CHECK: jne {{\.L.*}}
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; CHECK: br %r14
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entry:
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%and = and i64 %a, 65535
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%cmp = icmp ne i64 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check the lowest useful TMLH value, which is the next value up.
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define void @f3(i64 %a) {
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; CHECK-LABEL: f3:
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; CHECK: tmlh %r2, 1
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; CHECK: jne {{\.L.*}}
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; CHECK: br %r14
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entry:
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%and = and i64 %a, 65536
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%cmp = icmp ne i64 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check the next value up again, which cannot use TM.
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define void @f4(i64 %a) {
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; CHECK-LABEL: f4:
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; CHECK-NOT: {{tm[lh].}}
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; CHECK: br %r14
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entry:
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%and = and i64 %a, 4294901759
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%cmp = icmp eq i64 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check the high end of the TMLH range.
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define void @f5(i64 %a) {
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; CHECK-LABEL: f5:
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; CHECK: tmlh %r2, 65535
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; CHECK: je {{\.L.*}}
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; CHECK: br %r14
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entry:
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%and = and i64 %a, 4294901760
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%cmp = icmp eq i64 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check the lowest useful TMHL value.
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define void @f6(i64 %a) {
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; CHECK-LABEL: f6:
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; CHECK: tmhl %r2, 1
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; CHECK: je {{\.L.*}}
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; CHECK: br %r14
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entry:
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%and = and i64 %a, 4294967296
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%cmp = icmp eq i64 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check the next value up again, which cannot use TM.
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define void @f7(i64 %a) {
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; CHECK-LABEL: f7:
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; CHECK-NOT: {{tm[lh].}}
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; CHECK: br %r14
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entry:
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%and = and i64 %a, 4294967297
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%cmp = icmp ne i64 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check the high end of the TMHL range.
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define void @f8(i64 %a) {
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; CHECK-LABEL: f8:
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; CHECK: tmhl %r2, 65535
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; CHECK: jne {{\.L.*}}
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; CHECK: br %r14
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entry:
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%and = and i64 %a, 281470681743360
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%cmp = icmp ne i64 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check the lowest useful TMHH value.
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define void @f9(i64 %a) {
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; CHECK-LABEL: f9:
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; CHECK: tmhh %r2, 1
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; CHECK: jne {{\.L.*}}
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; CHECK: br %r14
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entry:
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%and = and i64 %a, 281474976710656
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%cmp = icmp ne i64 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check the high end of the TMHH range.
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define void @f10(i64 %a) {
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; CHECK-LABEL: f10:
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; CHECK: tmhh %r2, 65535
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; CHECK: je {{\.L.*}}
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; CHECK: br %r14
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entry:
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%and = and i64 %a, 18446462598732840960
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%cmp = icmp eq i64 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check that we can fold an SHL into a TMxx mask.
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define void @f11(i64 %a) {
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; CHECK-LABEL: f11:
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; CHECK: tmhl %r2, 32768
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; CHECK: jne {{\.L.*}}
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; CHECK: br %r14
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entry:
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%shl = shl i64 %a, 1
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%and = and i64 %shl, 281474976710656
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%cmp = icmp ne i64 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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; Check that we can fold an SHR into a TMxx mask.
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define void @f12(i64 %a) {
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; CHECK-LABEL: f12:
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; CHECK: tmhh %r2, 256
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; CHECK: jne {{\.L.*}}
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; CHECK: br %r14
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entry:
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%shr = lshr i64 %a, 56
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%and = and i64 %shr, 1
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%cmp = icmp ne i64 %and, 0
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br i1 %cmp, label %exit, label %store
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store:
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store i32 1, i32 *@g
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br label %exit
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exit:
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ret void
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}
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