Toma Tabacu 039eb5a7b8 [mips] [IAS] Fix expansion of negative 32-bit immediates for LI/DLI. ... Summary: To maintain compatibility with GAS, we need to stop treating negative 32-bit immediates as 64-bit values when expanding LI/DLI. This currently happens because of sign extension. To do this we need to choose the 32-bit value expansion for values which use their upper 33 bits only for sign extension (i.e. no 0's, only 1's). Reviewers: dsanders Reviewed By: dsanders Subscribers: llvm-commits Differential Revision: http://reviews.llvm.org/D8662 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@237428 91177308-0d34-0410-b5e6-96231b3b80d8		2015-05-15 09:42:11 +00:00
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AArch64	AArch64: add BFC alias for the BFI/BFM instructions.	2015-04-30 18:28:58 +00:00
ARM	[DWARF] Add CIE header fields address_size and segment_size when generating dwarf-4	2015-05-12 15:25:08 +00:00
AsmParser	[MC] Use LShr for constant evaluation of ">>" on ELF/arm64--darwin.	2015-04-28 01:37:11 +00:00
COFF	Don't omit the constant when computing a cross-section relative relocation.	2015-05-14 01:10:41 +00:00
Disassembler	[X86] Fix PR23271 - RIP-relative decoding bug in disassembler.	2015-05-13 22:44:52 +00:00
ELF	[DWARF] Add CIE header fields address_size and segment_size when generating dwarf-4	2015-05-12 15:25:08 +00:00
Hexagon	Expand MUX instructions early on Hexagon	2015-03-31 13:35:12 +00:00
MachO	MC: For variable symbols, maintain MCSymbol::Section as a cache.	2015-04-03 01:46:11 +00:00
Markup
Mips	[mips] [IAS] Fix expansion of negative 32-bit immediates for LI/DLI.	2015-05-15 09:42:11 +00:00
PowerPC	Add VSX Scalar loads and stores to the PPC back end	2015-05-07 18:24:05 +00:00
R600	R600/SI: Add missing -mcpu=SI to assembler test	2015-04-23 19:33:55 +00:00
Sparc	[Sparc] Repair fixups in little endian mode.	2015-05-01 17:13:02 +00:00
SystemZ	[SystemZ] Add z13 vector facility and MC support	2015-05-05 19:23:40 +00:00
X86	AVX-512: fixed a bug in encoding of VPSRAQ instrcution,	2015-05-13 07:35:05 +00:00