llvm-6502/test/CodeGen
Matt Arsenault 8b6a26ca85 Implement new way of expanding extloads.
Now that the source and destination types can be specified,
allow doing an expansion that doesn't use an EXTLOAD of the
result type. Try to do a legal extload to an intermediate type
and extend that if possible.

This generalizes the special case custom lowering of extloads
R600 has been using to work around this problem.

This also happens to fix a bug that would incorrectly use more
aligned loads than should be used.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225925 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-14 01:35:17 +00:00
..
AArch64 Fix PR22179. 2015-01-10 23:41:24 +00:00
ARM Debug info: Factor out the creation of DWARF expressions from AsmPrinter 2015-01-12 22:19:22 +00:00
CPP
Generic
Hexagon
Inputs
Mips Insert random noops to increase security against ROP attacks (llvm) 2015-01-14 01:07:26 +00:00
MSP430
NVPTX
PowerPC Revert "r225811 - Revert "r225808 - [PowerPC] Add StackMap/PatchPoint support"" 2015-01-14 01:07:51 +00:00
R600 Implement new way of expanding extloads. 2015-01-14 01:35:17 +00:00
SPARC
SystemZ Use the integrated assembler as default on SystemZ 2015-01-13 19:45:16 +00:00
Thumb
Thumb2 [ARM] Fix a bug in constant island pass that was triggering an assertion. 2015-01-08 20:44:50 +00:00
X86 Insert random noops to increase security against ROP attacks (llvm) 2015-01-14 01:07:26 +00:00
XCore