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https://github.com/c64scene-ar/llvm-6502.git
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4b5324ad2c
optimized x86-64 (and x86) calls so that they work (... at least for my test cases). Should fix the following problems: Problem 1: When i introduced the optimized handling of arguments for tail called functions (using a sequence of copyto/copyfrom virtual registers instead of always lowering to top of the stack) i did not handle byval arguments correctly e.g they did not work at all :). Problem 2: On x86-64 after the arguments of the tail called function are moved to their registers (which include ESI/RSI etc), tail call optimization performs byval lowering which causes xSI,xDI, xCX registers to be overwritten. This is handled in this patch by moving the arguments to virtual registers first and after the byval lowering the arguments are moved from those virtual registers back to RSI/RDI/RCX. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@49584 91177308-0d34-0410-b5e6-96231b3b80d8
20 lines
681 B
LLVM
20 lines
681 B
LLVM
; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep TAILCALL
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; check for the 2 byval moves
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; RUN: llvm-as < %s | llc -march=x86 -tailcallopt | grep rep | wc -l | grep 2
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%struct.s = type {i32, i32, i32, i32, i32, i32, i32, i32,
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i32, i32, i32, i32, i32, i32, i32, i32,
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i32, i32, i32, i32, i32, i32, i32, i32 }
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define fastcc i32 @tailcallee(%struct.s* byval %a) {
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entry:
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%tmp2 = getelementptr %struct.s* %a, i32 0, i32 0
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%tmp3 = load i32* %tmp2
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ret i32 %tmp3
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}
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define fastcc i32 @tailcaller(%struct.s* byval %a) {
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entry:
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%tmp4 = tail call fastcc i32 @tailcallee(%struct.s* %a byval)
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ret i32 %tmp4
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}
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