Devang Patel 8bc9ef77b7 If value map does not have register for an argument then try to find frame index before giving up. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@118022 91177308-0d34-0410-b5e6-96231b3b80d8		2010-11-02 17:19:03 +00:00
..
CMakeLists.txt
DAGCombiner.cpp	Remove DAG combiner patch to fold vector splats. Instcombiner does it now.	2010-10-29 22:03:02 +00:00
FastISel.cpp
FunctionLoweringInfo.cpp
InstrEmitter.cpp
InstrEmitter.h
LegalizeDAG.cpp	Add a pre-dispatch SjLj EH hook on the unwind edge for targets to do any	2010-10-19 23:27:08 +00:00
LegalizeFloatTypes.cpp
LegalizeIntegerTypes.cpp
LegalizeTypes.cpp
LegalizeTypes.h
LegalizeTypesGeneric.cpp
LegalizeVectorOps.cpp
LegalizeVectorTypes.cpp	Remove Synthesizable from the Type system; as MMX vector	2010-10-20 21:32:10 +00:00
Makefile
ScheduleDAGFast.cpp
ScheduleDAGList.cpp
ScheduleDAGRRList.cpp	Avoiding overly aggressive latency scheduling. If the two nodes share an	2010-10-29 18:09:28 +00:00
ScheduleDAGSDNodes.cpp	Avoiding overly aggressive latency scheduling. If the two nodes share an	2010-10-29 18:09:28 +00:00
ScheduleDAGSDNodes.h
SDNodeDbgValue.h
SDNodeOrdering.h
SelectionDAG.cpp	Use a MemIntrinsicSDNode for ISD::PREFETCH, which touches	2010-10-26 23:11:10 +00:00
SelectionDAGBuilder.cpp	If value map does not have register for an argument then try to find frame index before giving up.	2010-11-02 17:19:03 +00:00
SelectionDAGBuilder.h
SelectionDAGISel.cpp	For statistics that are only used in functions declared in !NDEBUG, wrap the	2010-10-26 00:51:57 +00:00
SelectionDAGPrinter.cpp
TargetLowering.cpp	Inline asm multiple alternative constraints development phase 2 - improved basic logic, added initial platform support.	2010-10-29 17:29:13 +00:00
TargetSelectionDAGInfo.cpp