..
2004-11-29-ShrCrash.ll
2004-11-30-shift-crash.ll
2004-11-30-shr-var-crash.ll
2004-12-12-ZeroSizeCommon.ll
2005-01-14-SetSelectCrash.ll
2005-01-14-UndefLong.ll
2005-08-12-rlwimi-crash.ll
2005-09-02-LegalizeDuplicatesCalls.ll
2005-10-08-ArithmeticRotate.ll
2005-11-30-vastart-crash.ll
2006-01-11-darwin-fp-argument.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2006-01-20-ShiftPartsCrash.ll
2006-04-01-FloatDoubleExtend.ll
2006-04-05-splat-ish.ll
2006-04-19-vmaddfp-crash.ll
2006-05-12-rlwimi-crash.ll
2006-07-07-ComputeMaskedBits.ll
2006-07-19-stwbrx-crash.ll
2006-08-11-RetVector.ll
2006-08-15-SelectionCrash.ll
2006-09-28-shift_64.ll
2006-10-11-combiner-aa-regression.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2006-10-13-Miscompile.ll
2006-10-17-brcc-miscompile.ll
2006-10-17-ppc64-alloca.ll
2006-11-10-DAGCombineMiscompile.ll
2006-11-29-AltivecFPSplat.ll
2006-12-07-LargeAlloca.ll
2006-12-07-SelectCrash.ll
2007-01-04-ArgExtension.ll
2007-01-15-AsmDialect.ll
2007-01-29-lbrx-asm.ll
2007-01-31-InlineAsmAddrMode.ll
2007-02-16-AlignPacked.ll
2007-02-16-InlineAsmNConstraint.ll
2007-02-23-lr-saved-twice.ll
2007-03-24-cntlzd.ll
2007-03-30-SpillerCrash.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2007-04-24-InlineAsm-I-Modifier.ll
2007-04-30-InlineAsmEarlyClobber.ll
Fix PR3149. If an early clobber def is a physical register and it is tied to an input operand, it effectively extends the live range of the physical register. Currently we do not have a good way to represent this.
2008-12-19 20:58:01 +00:00
2007-05-03-InlineAsm-S-Constraint.ll
2007-05-14-InlineAsmSelectCrash.ll
2007-05-22-tailmerge-3.ll
2007-05-30-dagcombine-miscomp.ll
2007-06-28-BCCISelBug.ll
2007-08-04-CoalescerAssert.ll
2007-09-04-AltivecDST.ll
2007-09-07-LoadStoreIdxForms.ll
2007-09-08-unaligned.ll
2007-09-11-RegCoalescerAssert.ll
2007-09-12-LiveIntervalsAssert.ll
2007-10-16-InlineAsmFrameOffset.ll
2007-10-18-PtrArithmetic.ll
2007-10-21-LocalRegAllocAssert2.ll
2007-10-21-LocalRegAllocAssert.ll
2007-11-04-CoalescerCrash.ll
2007-11-16-landingpad-split.ll
this test should not run opt -std-compile-opts, it should run
2009-01-09 05:32:00 +00:00
2007-11-19-VectorSplitting.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-01-25-EmptyFunction.ll
2008-02-05-LiveIntervalsAssert.ll
2008-02-09-LocalRegAllocAssert.ll
2008-03-05-RegScavengerAssert.ll
2008-03-06-KillInfo.ll
2008-03-17-RegScavengerCrash.ll
2008-03-18-RegScavengerAssert.ll
2008-03-24-AddressRegImm.ll
2008-03-24-CoalescerBug.ll
2008-03-26-CoalescerBug.ll
2008-04-10-LiveIntervalCrash.ll
2008-04-16-CoalescerBug.ll
2008-04-23-CoalescerCrash.ll
2008-05-01-ppc_fp128.ll
2008-06-19-LegalizerCrash.ll
2008-06-21-F128LoadStore.ll
2008-06-23-LiveVariablesCrash.ll
2008-07-10-SplatMiscompile.ll
2008-07-15-Bswap.ll
2008-07-15-Fabs.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-07-15-SignExtendInreg.ll
2008-07-17-Fneg.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-07-24-PPC64-CCBug.ll
2008-09-12-CoalescerBug.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-10-17-AsmMatchingOperands.ll
We have decided not to support inline asm where an output operand with a matching input operand with incompatible type (i.e. either one is a floating point and the other is an integer or the sizes of the types differ). SelectionDAGBuild will catch these and exit with an error.
2008-12-16 18:21:39 +00:00
2008-10-28-f128-i32.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-10-28-UnprocessedNode.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
2008-10-30-IllegalShift.ll
2008-10-31-PPCF128Libcalls.ll
2008-12-02-LegalizeTypeAssert.ll
Remove a (what appears to be) overly strict assertion. Here is what happened:
2008-12-02 21:57:09 +00:00
2008-12-12-EH.ll
rename a file to follow naming conventions.
2009-01-02 01:52:35 +00:00
2009-01-16-DeclareISelBug.ll
Fix PPC ISD::Declare isel and eliminate the need for PPCTargetLowering::LowerGlobalAddress to check if isVerifiedDebugInfoDesc() is true. Given the recent changes, it would falsely return true for a lot of GlobalAddressSDNode's.
2009-01-16 22:57:32 +00:00
2009-03-17-LSRBug.ll
Add another test case for r64440.
2009-03-18 02:43:01 +00:00
2009-05-28-LegalizeBRCC.ll
Add explicit test for PR4280.
2009-05-28 21:04:35 +00:00
addc.ll
addi-reassoc.ll
align.ll
and_add.ll
and_sext.ll
and_sra.ll
and-branch.ll
and-elim.ll
and-imm.ll
atomic-1.ll
atomic-2.ll
Atomics-32.ll
Atomics-64.ll
available-externally.ll
get the PPC stub temporary label from the mangler instead of
2009-07-15 02:56:53 +00:00
big-endian-actual-args.ll
big-endian-call-result.ll
big-endian-formal-args.ll
branch-opt.ll
bswap-load-store.ll
buildvec_canonicalize.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
calls.ll
cmp-cmp.ll
compare-duplicate.ll
compare-simm.ll
constants.ll
cr_spilling.ll
Second attempt:
2009-04-29 00:15:41 +00:00
cttz.ll
darwin-labels.ll
delete-node.ll
dg.exp
div-2.ll
eqv-andc-orc-nor.ll
extsh.ll
fabs.ll
fma.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fnabs.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fneg.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
fold-li.ll
fp_to_uint.ll
fp-branch.ll
fp-int-fp.ll
fpcopy.ll
Frames-alloca.ll
Frames-large.ll
Frames-leaf.ll
Frames-small.ll
frounds.ll
fsqrt.ll
hello.ll
hidden-vis-2.ll
Re-did 60519. It turns out Darwin's handling of hidden visibility symbols are a bit more complicate than I expected. Both declarations and weak definitions still need a stub indirection. However, the stubs are in data section and they contain the addresses of the actual symbols.
2008-12-05 01:06:39 +00:00
hidden-vis.ll
Re-did 60519. It turns out Darwin's handling of hidden visibility symbols are a bit more complicate than I expected. Both declarations and weak definitions still need a stub indirection. However, the stubs are in data section and they contain the addresses of the actual symbols.
2008-12-05 01:06:39 +00:00
i64_fp.ll
i128-and-beyond.ll
iabs.ll
illegal-element-type.ll
inlineasm-copy.ll
int-fp-conv-0.ll
Don't grep the -debug output. This isn't the way to test changes.
2009-06-25 21:59:32 +00:00
int-fp-conv-1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
invalid-memcpy.ll
inverted-bool-compares.ll
ispositive.ll
itofp128.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
LargeAbsoluteAddr.ll
lha.ll
load-constant-addr.ll
long-compare.ll
longdbl-truncate.ll
mask64.ll
mem_update.ll
mem-rr-addr-mode.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
mul-neg-power-2.ll
mul-with-overflow.ll
Add some generic expansion logic for SMULO and UMULO. Fixes UMULO
2009-06-16 06:58:29 +00:00
mulhs.ll
multiple-return-values.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
neg.ll
no-dead-strip.ll
or-addressing-mode.ll
ppcf128-1-opt.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
ppcf128-1.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
ppcf128-2.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
ppcf128-3.ll
ppcf128-4.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
pr3711_widen_bit.ll
Added missing support for widening when splitting an unary op (PR3683)
2009-03-18 06:24:04 +00:00
private.ll
convert this test to filecheck style
2009-07-14 18:57:40 +00:00
reg-coalesce-simple.ll
retaddr.ll
return-val-i128.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
rlwimi2.ll
rlwimi3.ll
rlwimi-commute.ll
rlwimi.ll
rlwinm2.ll
rlwinm.ll
rotl-2.ll
rotl-64.ll
rotl.ll
select_lt0.ll
select-cc.ll
setcc_no_zext.ll
seteq-0.ll
shift128.ll
shl_elim.ll
shl_sext.ll
sign_ext_inreg1.ll
small-arguments.ll
stfiwx-2.ll
stfiwx.ll
store-load-fwd.ll
subc.ll
tailcall1-64.ll
tailcall1.ll
tailcallpic1.ll
tango.net.ftp.FtpClient.ll
Check in a reduced version of this testcase.
2009-07-13 23:04:44 +00:00
trampoline.ll
unsafe-math.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vcmp-fold.ll
vec_br_cmp.ll
vec_call.ll
vec_constants.ll
vec_fneg.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_insert.ll
vec_misaligned.ll
vec_mul.ll
vec_perf_shuffle.ll
vec_shift.ll
PR3628: Add patterns to match SHL/SRL/SRA to the corresponding Altivec
2009-06-07 01:07:55 +00:00
vec_shuffle.ll
vec_splat.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vec_vrsave.ll
vec_zero.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
vector-identity-shuffle.ll
vector.ll
Split the Add, Sub, and Mul instruction opcodes into separate
2009-06-04 22:49:04 +00:00
