Evan Cheng 8bdb0de2bd When remat'ing and destination virtual register has a sub-register index. Make sure the sub-register class matches the register class of the remat'ed instruction definition register class. ...

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@81204 91177308-0d34-0410-b5e6-96231b3b80d8

2009-09-08 06:39:07 +00:00

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Analysis

fix ComputeMaskedBits handling of zext/sext/trunc to work with vectors.

2009-09-08 00:13:52 +00:00

Archive

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AsmParser

Reappy r80998, now that the GlobalOpt bug that it exposed on MiniSAT is fixed.

2009-09-07 23:54:19 +00:00

Bitcode

Reappy r80998, now that the GlobalOpt bug that it exposed on MiniSAT is fixed.

2009-09-07 23:54:19 +00:00

CodeGen

When remat'ing and destination virtual register has a sub-register index. Make sure the sub-register class matches the register class of the remat'ed instruction definition register class.

2009-09-08 06:39:07 +00:00

CompilerDriver

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Debugger

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ExecutionEngine

Fix PR4845: r77946 completely broke x86_64 Darwin (or any situation where the

2009-09-02 00:19:03 +00:00

Linker

There is not any need to copy metadata while merging modules.

2009-09-03 20:35:57 +00:00

MC

Print "X-42" instead of "X+-42".

2009-09-08 06:37:35 +00:00

Support

Avoid warnings if assertions are off.

2009-09-06 19:28:38 +00:00

System

Using a signal handler that does nothing should be

2009-09-07 05:58:25 +00:00

Target

add support for some missing modifiers on jumptable/constant pool entries.

2009-09-08 06:25:12 +00:00

Transforms

remove a turd

2009-09-08 03:47:41 +00:00

VMCore

Hoist out the test+insert to CheckedTypes. This doesn't seem to affect

2009-09-08 05:46:15 +00:00

Makefile

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