mirror of
https://github.com/c64scene-ar/llvm-6502.git
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7a5d9c0611
hard coded command line option for the Mips soft float tests. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@236801 91177308-0d34-0410-b5e6-96231b3b80d8
134 lines
4.4 KiB
LLVM
134 lines
4.4 KiB
LLVM
; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -mattr=+soft-float -mips16-hard-float -relocation-model=static -mips16-constant-islands=true < %s | FileCheck %s -check-prefix=lcb
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; RUN: llc -mtriple=mipsel-linux-gnu -march=mipsel -mcpu=mips16 -mattr=+soft-float -mips16-hard-float -relocation-model=static -mips16-constant-islands=true < %s | FileCheck %s -check-prefix=lcbn
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@i = global i32 0, align 4
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@j = common global i32 0, align 4
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@k = common global i32 0, align 4
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; Function Attrs: nounwind optsize
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define i32 @bnez() #0 {
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entry:
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%0 = load i32, i32* @i, align 4, !tbaa !1
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%cmp = icmp eq i32 %0, 0
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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tail call void asm sideeffect ".space 10000", ""() #1, !srcloc !5
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store i32 0, i32* @i, align 4, !tbaa !1
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret i32 0
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}
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; lcb: .ent bnez
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; lcbn: .ent bnez
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; lcb: bnez ${{[0-9]+}}, $BB{{[0-9]+}}_{{[0-9]+}}
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; lcbn-NOT: bnez ${{[0-9]+}}, $BB{{[0-9]+}}_{{[0-9]+}} # 16 bit inst
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; lcb: .end bnez
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; lcbn: .end bnez
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; Function Attrs: nounwind optsize
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define i32 @beqz() #0 {
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entry:
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%0 = load i32, i32* @i, align 4, !tbaa !1
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%cmp = icmp eq i32 %0, 0
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br i1 %cmp, label %if.then, label %if.else
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if.then: ; preds = %entry
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store i32 10, i32* @j, align 4, !tbaa !1
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tail call void asm sideeffect ".space 10000", ""() #1, !srcloc !6
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br label %if.end
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if.else: ; preds = %entry
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store i32 55, i32* @j, align 4, !tbaa !1
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tail call void asm sideeffect ".space 10000", ""() #1, !srcloc !7
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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ret i32 0
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}
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; lcb: .ent beqz
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; lcbn: .ent beqz
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; lcb: beqz ${{[0-9]+}}, $BB{{[0-9]+}}_{{[0-9]+}}
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; lcbn-NOT: beqz ${{[0-9]+}}, $BB{{[0-9]+}}_{{[0-9]+}} # 16 bit inst
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; lcb: .end beqz
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; lcbn: .end beqz
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; Function Attrs: nounwind optsize
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define void @bteqz() #0 {
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entry:
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%0 = load i32, i32* @i, align 4, !tbaa !1
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%1 = load i32, i32* @j, align 4, !tbaa !1
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%cmp = icmp eq i32 %0, %1
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br i1 %cmp, label %if.then, label %if.else
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if.then: ; preds = %entry
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store i32 1, i32* @k, align 4, !tbaa !1
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tail call void asm sideeffect ".space 1000", ""() #1, !srcloc !8
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br label %if.end
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if.else: ; preds = %entry
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tail call void asm sideeffect ".space 1000", ""() #1, !srcloc !9
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store i32 2, i32* @k, align 4, !tbaa !1
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br label %if.end
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if.end: ; preds = %if.else, %if.then
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ret void
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}
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; lcb: .ent bteqz
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; lcbn: .ent bteqz
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; lcb: btnez $BB{{[0-9]+}}_{{[0-9]+}}
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; lcbn-NOT: btnez $BB{{[0-9]+}}_{{[0-9]+}} # 16 bit inst
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; lcb: .end bteqz
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; lcbn: .end bteqz
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; Function Attrs: nounwind optsize
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define void @btz() #0 {
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entry:
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%0 = load i32, i32* @i, align 4, !tbaa !1
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%1 = load i32, i32* @j, align 4, !tbaa !1
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%cmp1 = icmp sgt i32 %0, %1
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br i1 %cmp1, label %if.then, label %if.end
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if.then: ; preds = %entry, %if.then
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tail call void asm sideeffect ".space 60000", ""() #1, !srcloc !10
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%2 = load i32, i32* @i, align 4, !tbaa !1
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%3 = load i32, i32* @j, align 4, !tbaa !1
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%cmp = icmp sgt i32 %2, %3
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br i1 %cmp, label %if.then, label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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; lcb: .ent btz
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; lcbn: .ent btz
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; lcb: bteqz $BB{{[0-9]+}}_{{[0-9]+}}
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; lcbn-NOT: bteqz $BB{{[0-9]+}}_{{[0-9]+}} # 16 bit inst
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; lcb: btnez $BB{{[0-9]+}}_{{[0-9]+}}
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; lcbn-NOT: btnez $BB{{[0-9]+}}_{{[0-9]+}} # 16 bit inst
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; lcb: .end btz
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; lcbn: .end btz
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attributes #0 = { nounwind optsize "less-precise-fpmad"="false" "no-frame-pointer-elim"="false" "no-infs-fp-math"="false" "no-nans-fp-math"="false" "stack-protector-buffer-size"="8" "unsafe-fp-math"="false" "use-soft-float"="false" }
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attributes #1 = { nounwind }
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!llvm.ident = !{!0}
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!0 = !{!"clang version 3.5 (gitosis@dmz-portal.mips.com:clang.git ed197d08c90d82e1119774e10920e6f7a841c8ec) (gitosis@dmz-portal.mips.com:llvm.git b9235a363fa2dddb26ac01cbaed58efbc9eff392)"}
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!1 = !{!2, !2, i64 0}
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!2 = !{!"int", !3, i64 0}
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!3 = !{!"omnipotent char", !4, i64 0}
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!4 = !{!"Simple C/C++ TBAA"}
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!5 = !{i32 59}
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!6 = !{i32 156}
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!7 = !{i32 210}
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!8 = !{i32 299}
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!9 = !{i32 340}
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!10 = !{i32 412}
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