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8ecdc6d34f
We now emit this directive when we need to contradict the default value (e.g. -mno-odd-spreg is given) or an option changed the default value (e.g. -mfpxx is given). This restores support for the currently available head of binutils. However, at this point binutils 2.24 is still not sufficient since it does not support '.module fp=...'. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@213511 91177308-0d34-0410-b5e6-96231b3b80d8
59 lines
2.7 KiB
LLVM
59 lines
2.7 KiB
LLVM
; RUN: llc -march=mipsel -mcpu=mips32 < %s | FileCheck %s -check-prefix=ALL -check-prefix=ODDSPREG -check-prefix=ODDSPREG-NO-EMIT
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; RUN: llc -march=mipsel -mcpu=mips32 -mattr=+nooddspreg < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOODDSPREG
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; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fp64 < %s | FileCheck %s -check-prefix=ALL -check-prefix=ODDSPREG -check-prefix=ODDSPREG-NO-EMIT
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; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fp64,+nooddspreg < %s | FileCheck %s -check-prefix=ALL -check-prefix=NOODDSPREG
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; RUN: llc -march=mipsel -mcpu=mips32r6 -mattr=fpxx,-nooddspreg < %s | FileCheck %s -check-prefix=ALL -check-prefix=ODDSPREG -check-prefix=ODDSPREG-EMIT
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; We don't emit a directive unless we need to. This is to support versions of
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; GAS which do not support the directive.
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; ODDSPREG-EMIT: .module oddspreg
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; ODDSPREG-NO-EMIT-NOT: .module oddspreg
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; NOODDSPREG: .module nooddspreg
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define float @two_floats(float %a) {
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entry:
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; Clobber all except $f12 and $f13
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;
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; The intention is that if odd single precision registers are permitted, the
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; allocator will choose $f12 and $f13 to avoid the spill/reload.
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;
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; On the other hand, if odd single precision registers are not permitted, it
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; will be forced to spill/reload either %a or %0.
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%0 = fadd float %a, 1.0
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call void asm "# Clobber", "~{$f0},~{$f1},~{$f2},~{$f3},~{$f4},~{$f5},~{$f6},~{$f7},~{$f8},~{$f9},~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
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%1 = fadd float %a, %0
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ret float %1
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}
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; ALL-LABEL: two_floats:
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; ODDSPREG: add.s $f13, $f12, ${{f[0-9]+}}
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; ODDSPREG-NOT: swc1
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; ODDSPREG-NOT: lwc1
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; ODDSPREG: add.s $f0, $f12, $f13
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; NOODDSPREG: add.s $[[T0:f[0-9]*[02468]]], $f12, ${{f[0-9]+}}
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; NOODDSPREG: swc1 $[[T0]],
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; NOODDSPREG: lwc1 $[[T1:f[0-9]*[02468]]],
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; NOODDSPREG: add.s $f0, $f12, $[[T1]]
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define double @two_doubles(double %a) {
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entry:
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; Clobber all except $f12 and $f13
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;
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; -mno-odd-sp-reg doesn't need to affect double precision values so both cases
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; use $f12 and $f13.
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%0 = fadd double %a, 1.0
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call void asm "# Clobber", "~{$f0},~{$f1},~{$f2},~{$f3},~{$f4},~{$f5},~{$f6},~{$f7},~{$f8},~{$f9},~{$f10},~{$f11},~{$f14},~{$f15},~{$f16},~{$f17},~{$f18},~{$f19},~{$f20},~{$f21},~{$f22},~{$f23},~{$f24},~{$f25},~{$f26},~{$f27},~{$f28},~{$f29},~{$f30},~{$f31}"()
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%1 = fadd double %a, %0
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ret double %1
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}
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; ALL-LABEL: two_doubles:
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; ALL: add.d $[[T0:f[0-9]+]], $f12, ${{f[0-9]+}}
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; ALL: add.d $f0, $f12, $[[T0]]
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; INVALID: -mattr=+nooddspreg is not currently permitted for a 32-bit FPU register file (FR=0 mode).
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