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git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@181324 91177308-0d34-0410-b5e6-96231b3b80d8
185 lines
4.8 KiB
C++
185 lines
4.8 KiB
C++
//===-- HexagonBaseInfo.h - Top level definitions for Hexagon --*- C++ -*--===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This file contains small standalone helper functions and enum definitions for
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// the Hexagon target useful for the compiler back-end and the MC libraries.
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// As such, it deliberately does not include references to LLVM core
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// code gen types, passes, etc..
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//
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//===----------------------------------------------------------------------===//
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#ifndef HEXAGONBASEINFO_H
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#define HEXAGONBASEINFO_H
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#include "HexagonMCTargetDesc.h"
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#include "llvm/Support/ErrorHandling.h"
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namespace llvm {
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/// HexagonII - This namespace holds all of the target specific flags that
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/// instruction info tracks.
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///
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namespace HexagonII {
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// *** The code below must match HexagonInstrFormat*.td *** //
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// Insn types.
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// *** Must match HexagonInstrFormat*.td ***
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enum Type {
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TypePSEUDO = 0,
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TypeALU32 = 1,
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TypeCR = 2,
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TypeJR = 3,
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TypeJ = 4,
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TypeLD = 5,
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TypeST = 6,
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TypeSYSTEM = 7,
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TypeXTYPE = 8,
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TypeMEMOP = 9,
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TypeNV = 10,
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TypePREFIX = 30, // Such as extenders.
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TypeENDLOOP = 31 // Such as end of a HW loop.
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};
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enum SubTarget {
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HasV2SubT = 0xf,
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HasV2SubTOnly = 0x1,
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NoV2SubT = 0x0,
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HasV3SubT = 0xe,
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HasV3SubTOnly = 0x2,
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NoV3SubT = 0x1,
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HasV4SubT = 0xc,
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NoV4SubT = 0x3,
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HasV5SubT = 0x8,
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NoV5SubT = 0x7
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};
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enum AddrMode {
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NoAddrMode = 0, // No addressing mode
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Absolute = 1, // Absolute addressing mode
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AbsoluteSet = 2, // Absolute set addressing mode
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BaseImmOffset = 3, // Indirect with offset
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BaseLongOffset = 4, // Indirect with long offset
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BaseRegOffset = 5, // Indirect with register offset
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PostInc = 6 // Post increment addressing mode
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};
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enum MemAccessSize {
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NoMemAccess = 0, // Not a memory acces instruction.
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ByteAccess = 1, // Byte access instruction (memb).
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HalfWordAccess = 2, // Half word access instruction (memh).
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WordAccess = 3, // Word access instrution (memw).
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DoubleWordAccess = 4 // Double word access instruction (memd)
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};
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// MCInstrDesc TSFlags
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// *** Must match HexagonInstrFormat*.td ***
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enum {
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// This 5-bit field describes the insn type.
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TypePos = 0,
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TypeMask = 0x1f,
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// Solo instructions.
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SoloPos = 5,
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SoloMask = 0x1,
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// Predicated instructions.
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PredicatedPos = 6,
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PredicatedMask = 0x1,
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PredicatedFalsePos = 7,
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PredicatedFalseMask = 0x1,
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PredicatedNewPos = 8,
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PredicatedNewMask = 0x1,
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// New-Value consumer instructions.
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NewValuePos = 9,
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NewValueMask = 0x1,
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// New-Value producer instructions.
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hasNewValuePos = 10,
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hasNewValueMask = 0x1,
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// Which operand consumes or produces a new value.
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NewValueOpPos = 11,
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NewValueOpMask = 0x7,
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// Which bits encode the new value.
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NewValueBitsPos = 14,
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NewValueBitsMask = 0x3,
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// Stores that can become new-value stores.
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mayNVStorePos = 16,
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mayNVStoreMask = 0x1,
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// New-value store instructions.
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NVStorePos = 17,
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NVStoreMask = 0x1,
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// Extendable insns.
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ExtendablePos = 18,
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ExtendableMask = 0x1,
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// Insns must be extended.
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ExtendedPos = 19,
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ExtendedMask = 0x1,
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// Which operand may be extended.
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ExtendableOpPos = 20,
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ExtendableOpMask = 0x7,
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// Signed or unsigned range.
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ExtentSignedPos = 23,
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ExtentSignedMask = 0x1,
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// Number of bits of range before extending operand.
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ExtentBitsPos = 24,
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ExtentBitsMask = 0x1f,
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// Valid subtargets
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validSubTargetPos = 29,
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validSubTargetMask = 0xf,
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// Addressing mode for load/store instructions.
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AddrModePos = 33,
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AddrModeMask = 0x7,
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// Access size of memory access instructions (load/store).
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MemAccessSizePos = 36,
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MemAccesSizeMask = 0x7
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};
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// *** The code above must match HexagonInstrFormat*.td *** //
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// Hexagon specific MO operand flag mask.
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enum HexagonMOTargetFlagVal {
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//===------------------------------------------------------------------===//
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// Hexagon Specific MachineOperand flags.
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MO_NO_FLAG,
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HMOTF_ConstExtended = 1,
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/// MO_PCREL - On a symbol operand, indicates a PC-relative relocation
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/// Used for computing a global address for PIC compilations
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MO_PCREL,
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/// MO_GOT - Indicates a GOT-relative relocation
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MO_GOT,
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// Low or high part of a symbol.
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MO_LO16, MO_HI16,
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// Offset from the base of the SDA.
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MO_GPREL
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};
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} // End namespace HexagonII.
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} // End namespace llvm.
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#endif
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