llvm-6502/test/MC/Sparc
Venkatraman Govindaraju 8c6a26194b [Sparc] Correct quad register list in the asm parser.
Add test cases to check parsing of v9 double registers and their aliased quad registers.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@199974 91177308-0d34-0410-b5e6-96231b3b80d8
2014-01-24 05:24:01 +00:00
..
lit.local.cfg
sparc64-alu-instructions.s [SparcV9] Rename operands in some sparc64 instructions so that TableGen can encode them correctly. 2014-01-08 07:47:57 +00:00
sparc64-ctrl-instructions.s [Sparc] Add support for parsing branch instructions and conditional moves. 2014-01-08 06:14:52 +00:00
sparc-alu-instructions.s
sparc-ctrl-instructions.s [Sparc] Add support for parsing jmpl instruction and make indirect call and jmp instructions as aliases to jmpl. 2014-01-10 01:48:17 +00:00
sparc-fp-instructions.s [Sparc] Correct quad register list in the asm parser. 2014-01-24 05:24:01 +00:00
sparc-mem-instructions.s
sparc-relocations.s [Sparc] Add support for parsing sparc asm modifiers such as %hi, %lo etc., 2014-01-07 08:00:49 +00:00