llvm-6502/lib/CodeGen/SelectionDAG
Dan Gohman 8c8c5fcbd7 Use getVectorTypeBreakdown in FunctionLoweringInfo::CreateRegForValue
to compute the number and type of registers needed for vector values
instead of computing it manually. This fixes PR1529.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@37755 91177308-0d34-0410-b5e6-96231b3b80d8
2007-06-27 14:34:07 +00:00
..
CallingConvLower.cpp add isVarArg to CCState 2007-06-19 00:11:09 +00:00
DAGCombiner.cpp Generalize MVT::ValueType and associated functions to be able to represent 2007-06-25 16:23:39 +00:00
LegalizeDAG.cpp Make the comment for ScalarizeVectorOp mention that it is only for use 2007-06-27 14:06:22 +00:00
Makefile
ScheduleDAG.cpp Pass a SelectionDAG into SDNode::dump everywhere it's used, in prepration 2007-06-19 14:13:56 +00:00
ScheduleDAGList.cpp switch the sched unit map over to use a DenseMap instead of std::map. This 2007-02-03 01:34:13 +00:00
ScheduleDAGRRList.cpp std::set is really really terrible. Switch to SmallPtrSet to reduce compile time. For Duraid's example. The overall isel time is reduced from 0.6255 sec to 0.1876 sec. 2007-06-22 01:35:51 +00:00
ScheduleDAGSimple.cpp Removed tabs everywhere except autogenerated & external files. Add make 2007-04-16 18:10:23 +00:00
SelectionDAG.cpp Generalize MVT::ValueType and associated functions to be able to represent 2007-06-25 16:23:39 +00:00
SelectionDAGISel.cpp Use getVectorTypeBreakdown in FunctionLoweringInfo::CreateRegForValue 2007-06-27 14:34:07 +00:00
SelectionDAGPrinter.cpp Make chain dependencies blue, in addition to being dashed. 2007-06-18 15:30:16 +00:00
TargetLowering.cpp Generalize MVT::ValueType and associated functions to be able to represent 2007-06-25 16:23:39 +00:00