llvm-6502/test/MC/ARM/arm-thumb-trustzone.s
Tim Northover 8c9e52a9fc ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.
These instructions aren't universally available, but depend on a specific
extension to the normal ARM architecture (rather than, say, v6/v7/...) so a new
feature is appropriate.

This also enables the feature by default on A-class cores which usually have
these extensions, to avoid breaking existing code and act as a sensible
default.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179171 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-10 12:08:35 +00:00

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ArmAsm

@ RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=-trustzone < %s | FileCheck %s -check-prefix=NOTZ
@ RUN: llvm-mc -triple=thumbv7-apple-darwin -mcpu=cortex-a8 -show-encoding -mattr=trustzone < %s | FileCheck %s -check-prefix=TZ
.syntax unified
.globl _func
@ Check that the assembler processes SMC instructions when TrustZone support is
@ active and that it rejects them when this feature is not enabled
_func:
@ CHECK: _func
@------------------------------------------------------------------------------
@ SMC
@------------------------------------------------------------------------------
smc #0xf
ite eq
smceq #0
@ NOTZ-NOT: smc #15
@ NOTZ-NOT: smceq #0
@ TZ: smc #15 @ encoding: [0xff,0xf7,0x00,0x80]
@ TZ: ite eq @ encoding: [0x0c,0xbf]
@ TZ: smceq #0 @ encoding: [0xf0,0xf7,0x00,0x80]