Tim Northover 8c9e52a9fc ARM: Make "SMC" instructions conditional on new TrustZone architecture feature. ... These instructions aren't universally available, but depend on a specific extension to the normal ARM architecture (rather than, say, v6/v7/...) so a new feature is appropriate. This also enables the feature by default on A-class cores which usually have these extensions, to avoid breaking existing code and act as a sensible default. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179171 91177308-0d34-0410-b5e6-96231b3b80d8		2013-04-10 12:08:35 +00:00
..
AArch64	AArch64: implement ETMv4 trace system registers.	2013-04-03 12:31:29 +00:00
ARM	ARM: Make "SMC" instructions conditional on new TrustZone architecture feature.	2013-04-10 12:08:35 +00:00
MBlaze	Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu	2012-03-25 09:02:19 +00:00
Mips	This is a resubmittal. For some reason it broke the bots yesterday	2013-01-17 00:28:20 +00:00
X86	x86 -- disassemble the REP/REPNE prefix when needed	2013-03-25 18:59:38 +00:00
XCore	[XCore] Add bru instruction.	2013-04-04 20:05:35 +00:00