llvm-6502/test/CodeGen
Daniel Sanders 8d7b0bdcf0 [mips] Add support for accessing $gp as a named register.
Summary:
Mips Linux uses $gp to hold a pointer to thread info structure and accesses it
with a named register. This makes this work for LLVM.

The N32 ABI doesn't quite work yet since the frontend generates incorrect IR
for this case. It neglects to truncate the 64-bit GPR to a 32-bit value before
converting to a pointer. Given correct IR (as in the testcase in this patch),
it works correctly.

Reviewers: sstankovic, vmedic, atanasyan

Reviewed By: atanasyan

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D6893

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@225529 91177308-0d34-0410-b5e6-96231b3b80d8
2015-01-09 17:21:30 +00:00
..
AArch64
ARM
CPP
Generic
Hexagon
Inputs
Mips [mips] Add support for accessing $gp as a named register. 2015-01-09 17:21:30 +00:00
MSP430
NVPTX
PowerPC [PowerPC] Fold [sz]ext with fp_to_int lowering where possible 2015-01-09 01:34:30 +00:00
R600
SPARC
SystemZ
Thumb
Thumb2 [ARM] Fix a bug in constant island pass that was triggering an assertion. 2015-01-08 20:44:50 +00:00
X86 RegisterCoalescer: Fix removeCopyByCommutingDef with subreg liveness 2015-01-09 03:01:31 +00:00
XCore