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can be eliminated by the allocator is the destination and source targets the same register. The most common case is when the source and destination registers are in different class. For example, on x86 mov32to32_ targets GR32_ which contains a subset of the registers in GR32. The allocator can do 2 things: 1. Set the preferred allocation for the destination of a copy to that of its source. 2. After allocation is done, change the allocation of a copy destination (if legal) so the copy can be eliminated. This eliminates 443 extra moves from 403.gcc. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@43662 91177308-0d34-0410-b5e6-96231b3b80d8
36 lines
1010 B
LLVM
36 lines
1010 B
LLVM
; RUN: llvm-as < %s | llc -march=x86 | grep mov | count 3
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define fastcc i32 @_Z18yy_get_next_bufferv() {
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entry:
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br label %bb131
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bb116: ; preds = %bb131
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%tmp125126 = trunc i32 %c.1 to i8 ; <i8> [#uses=1]
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store i8 %tmp125126, i8* null, align 1
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br label %bb131
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bb131: ; preds = %bb116, %entry
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%c.2 = phi i32 [ %c.1, %bb116 ], [ 42, %entry ] ; <i32> [#uses=1]
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%c.1 = select i1 false, i32 0, i32 %c.2 ; <i32> [#uses=4]
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%tmp181 = icmp eq i32 %c.1, -1 ; <i1> [#uses=1]
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br i1 %tmp181, label %bb158, label %bb116
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bb158: ; preds = %bb131
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br i1 true, label %cond_true163, label %cond_next178
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cond_true163: ; preds = %bb158
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%tmp172173 = trunc i32 %c.1 to i8 ; <i8> [#uses=1]
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store i8 %tmp172173, i8* null, align 1
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br label %cond_next178
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cond_next178: ; preds = %cond_true163, %bb158
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%tmp180 = icmp eq i32 %c.1, -1 ; <i1> [#uses=1]
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br i1 %tmp180, label %cond_next184, label %cond_next199
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cond_next184: ; preds = %cond_next178
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ret i32 0
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cond_next199: ; preds = %cond_next178
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ret i32 0
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}
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