…
..
intrinsics
absaddr-store.ll
absimm.ll
adde.ll
always-ext.ll
args.ll
ashift-left-right.ll
block-addr.ll
BranchPredict.ll
cext-check.ll
cext-valid-packet1.ll
cext-valid-packet2.ll
cmp_pred2.ll
cmp_pred_reg.ll
cmp_pred.ll
cmp-to-genreg.ll	Hexagon: Add V4 compare instructions. Enable relationship mapping	2013-02-05 16:42:24 +00:00
cmp-to-predreg.ll
cmpb_pred.ll
combine_ir.ll
combine.ll
convertdptoint.ll
convertdptoll.ll
convertsptoint.ll
convertsptoll.ll
ctlz-cttz-ctpop.ll
ctor.ll
dadd.ll
dmul.ll
double.ll
doubleconvert-ieee-rnd-near.ll
dsub.ll
dualstore.ll
extload-combine.ll
fadd.ll
fcmp.ll
float.ll
floatconvert-ieee-rnd-near.ll
fmul.ll
frame.ll
fsub.ll
fusedandshift.ll
gp-plus-offset-load.ll
gp-plus-offset-store.ll
gp-rel.ll
hwloop-cleanup.ll
hwloop-const.ll
hwloop-dbg.ll
hwloop-le.ll
hwloop-lt1.ll
hwloop-lt.ll
hwloop-ne.ll
i1_VarArg.ll
i8_VarArg.ll
i16_VarArg.ll
idxload-with-zero-offset.ll
indirect-br.ll
lit.local.cfg
macint.ll
memops1.ll
memops2.ll
memops3.ll
memops.ll
misaligned-access.ll
mpy.ll
newvaluejump2.ll
newvaluejump.ll
newvaluestore.ll
opt-fabs.ll
opt-fneg.ll
packetize_cond_inst.ll
postinc-load.ll
postinc-store.ll
pred-absolute-store.ll
pred-gp.ll
pred-instrs.ll
predicate-copy.ll
remove_lsr.ll
simpletailcall.ll
split-const32-const64.ll
static.ll
struct_args_large.ll
struct_args.ll
sube.ll
tail-call-trunc.ll
tfr-to-combine.ll
union-1.ll
vaddh.ll
validate-offset.ll
zextloadi1.ll