Andrew Trick 8dd26253f5 RegAlloc superpass: includes phi elimination, coalescing, and scheduling. ... Creates a configurable regalloc pipeline. Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa. When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>. CodeGen transformation passes are never "required" as an analysis ProcessImplicitDefs does not require LiveVariables. We have a plan to massively simplify some of the early passes within the regalloc superpass. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@150226 91177308-0d34-0410-b5e6-96231b3b80d8		2012-02-10 04:10:36 +00:00
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Mangler.h	Remove std::string version of getNameWithPrefix.	2011-02-11 05:23:09 +00:00
Target.td	Specify SubRegIndex components on the index itself.	2012-02-01 23:16:41 +00:00
TargetCallingConv.h	Minimize #include's and forward-declares in Target.	2011-12-10 22:35:47 +00:00
TargetCallingConv.td	Add TableGen support for callee saved registers.	2012-01-17 22:46:58 +00:00
TargetData.h	Haven't yet found a nice way to handle TargetData verification in the	2011-10-20 19:24:44 +00:00
TargetELFWriterInfo.h	Jim Asked us to move DataLayout on ARM back to the most specialized classes. Do	2010-10-03 18:59:45 +00:00
TargetFrameLowering.h	Emit segmented-stack specific code into function prologues for	2011-08-30 19:39:58 +00:00
TargetInstrInfo.h	Convert assert(0) to llvm_unreachable	2012-02-05 22:14:15 +00:00
TargetIntrinsicInfo.h	land David Blaikie's patch to de-constify Type, with a few tweaks.	2011-07-18 04:54:35 +00:00
TargetJITInfo.h	Convert assert(0) to llvm_unreachable	2012-02-05 22:14:15 +00:00
TargetLibraryInfo.h	Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch	2011-12-20 02:50:00 +00:00
TargetLowering.h	Convert assert(0) to llvm_unreachable	2012-02-05 22:14:15 +00:00
TargetLoweringObjectFile.h	Properly emit ctors / dtors with priorities into desired sections	2012-01-25 22:24:19 +00:00
TargetMachine.h	TargetPassConfig: confine the MC configuration to TargetMachine.	2012-02-04 02:56:59 +00:00
TargetOpcodes.h	First chunk of MachineInstr bundle support.	2011-12-06 22:12:01 +00:00
TargetOptions.h	RegAlloc superpass: includes phi elimination, coalescing, and scheduling.	2012-02-10 04:10:36 +00:00
TargetRegisterInfo.h	Store just the SimpleValueType in the generated VT tables for each register class, eliminating static ctors.	2012-02-09 12:35:37 +00:00
TargetSchedule.td	Comments about operand cycles and pipeline forwarding pathes.	2010-09-30 22:01:50 +00:00
TargetSelectionDAG.td	Initial CodeGen support for CTTZ/CTLZ where a zero input produces an	2011-12-13 01:56:10 +00:00
TargetSelectionDAGInfo.h	reimplement memcpy/memmove/memset lowering to use MachinePointerInfo	2010-09-21 05:40:29 +00:00
TargetSubtargetInfo.h	Rename TargetSubtarget to TargetSubtargetInfo for consistency.	2011-07-01 21:01:15 +00:00