Artyom Skrobov 45a31492d5 Condition codes AL and NV are invalid in the aliases that use ... inverted condition codes (CINC, CINV, CNEG, CSET, and CSETM). Matching aliases based on "immediate classes", when disassembling, wasn't previously supported, hence adding MCOperandPredicate into class Operand, and implementing the support for it in AsmWriterEmitter. The parsing for those aliases was already custom, so just adding the missing condition into AArch64AsmParser::parseCondCode. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@210528 91177308-0d34-0410-b5e6-96231b3b80d8		2014-06-10 13:11:35 +00:00
..
CostTable.h
Target.td	Condition codes AL and NV are invalid in the aliases that use	2014-06-10 13:11:35 +00:00
TargetCallingConv.h	ARM: HFAs must be passed in consecutive registers	2014-05-09 14:01:47 +00:00
TargetCallingConv.td	ARM: HFAs must be passed in consecutive registers	2014-05-09 14:01:47 +00:00
TargetFrameLowering.h
TargetInstrInfo.h	Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.	2014-06-05 19:29:43 +00:00
TargetIntrinsicInfo.h
TargetItinerary.td
TargetJITInfo.h
TargetLibraryInfo.h
TargetLowering.h	Target: remove old constructors for CallLoweringInfo	2014-05-17 21:50:17 +00:00
TargetLoweringObjectFile.h	Fix a few issues with comdat handling on COFF.	2014-06-06 19:26:12 +00:00
TargetMachine.h	Move the verbose asm option to be part of the options struct and	2014-05-20 23:59:50 +00:00
TargetOpcodes.h
TargetOptions.h	Add a new attribute called 'jumptable' that creates jump-instruction tables for functions marked with this attribute.	2014-06-05 19:29:43 +00:00
TargetRegisterInfo.h
TargetSchedule.td	Move late partial-unrolling thresholds into the processor definitions	2014-05-08 09:14:44 +00:00
TargetSelectionDAG.td
TargetSelectionDAGInfo.h	Have TargetSelectionDAGInfo take a DataLayout initializer rather than	2014-06-06 19:04:48 +00:00
TargetSubtargetInfo.h	Add a subtarget hook: enablePostMachineScheduler.	2014-06-04 07:06:27 +00:00