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The MicroBlaze is a highly configurable 32-bit soft-microprocessor for use on Xilinx FPGAs. For more information see: http://www.xilinx.com/tools/microblaze.htm http://en.wikipedia.org/wiki/MicroBlaze The current LLVM MicroBlaze backend generates assembly which can be compiled using the an appropriate binutils assembler. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@96969 91177308-0d34-0410-b5e6-96231b3b80d8
42 lines
1.6 KiB
C++
42 lines
1.6 KiB
C++
//===- MBlazeCallingConv.td - Calling Conventions for MBlaze ----*- C++ -*-===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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// This describes the calling conventions for MBlaze architecture.
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//===----------------------------------------------------------------------===//
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/// CCIfSubtarget - Match if the current subtarget has a feature F.
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class CCIfSubtarget<string F, CCAction A>:
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CCIf<!strconcat("State.getTarget().getSubtarget<MBlazeSubtarget>().", F), A>;
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//===----------------------------------------------------------------------===//
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// MBlaze ABI Calling Convention
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//===----------------------------------------------------------------------===//
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def CC_MBlaze : CallingConv<[
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// Promote i8/i16 arguments to i32.
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CCIfType<[i8, i16], CCPromoteToType<i32>>,
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// Integer arguments are passed in integer registers.
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CCIfType<[i32], CCAssignToReg<[R5, R6, R7, R8, R9, R10]>>,
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// Single fp arguments are passed in floating point registers
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CCIfType<[f32], CCAssignToReg<[F5, F6, F7, F8, F9, F10]>>,
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// 32-bit values get stored in stack slots that are 4 bytes in
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// size and 4-byte aligned.
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CCIfType<[i32, f32], CCAssignToStack<4, 4>>
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]>;
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def RetCC_MBlaze : CallingConv<[
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// i32 are returned in registers R3, R4
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CCIfType<[i32], CCAssignToReg<[R3, R4]>>,
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// f32 are returned in registers F3, F4
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CCIfType<[f32], CCAssignToReg<[F3, F4]>>
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]>;
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