mirror of
https://github.com/c64scene-ar/llvm-6502.git
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This adds a second implementation of the AArch64 architecture to LLVM, accessible in parallel via the "arm64" triple. The plan over the coming weeks & months is to merge the two into a single backend, during which time thorough code review should naturally occur. Everything will be easier with the target in-tree though, hence this commit. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
89 lines
3.2 KiB
LLVM
89 lines
3.2 KiB
LLVM
; RUN: llc -asm-verbose=false < %s -march=arm64 -arm64-neon-syntax=apple | FileCheck %s
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define float @test_f32(float* %A, float* %B, float* %C) nounwind {
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;CHECK-LABEL: test_f32:
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;CHECK: fmadd
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;CHECK-NOT: fmadd
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%tmp1 = load float* %A
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%tmp2 = load float* %B
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%tmp3 = load float* %C
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%tmp4 = call float @llvm.fmuladd.f32(float %tmp1, float %tmp2, float %tmp3)
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ret float %tmp4
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}
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define <2 x float> @test_v2f32(<2 x float>* %A, <2 x float>* %B, <2 x float>* %C) nounwind {
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;CHECK-LABEL: test_v2f32:
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;CHECK: fmla.2s
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;CHECK-NOT: fmla.2s
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%tmp1 = load <2 x float>* %A
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%tmp2 = load <2 x float>* %B
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%tmp3 = load <2 x float>* %C
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%tmp4 = call <2 x float> @llvm.fmuladd.v2f32(<2 x float> %tmp1, <2 x float> %tmp2, <2 x float> %tmp3)
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ret <2 x float> %tmp4
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}
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define <4 x float> @test_v4f32(<4 x float>* %A, <4 x float>* %B, <4 x float>* %C) nounwind {
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;CHECK-LABEL: test_v4f32:
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;CHECK: fmla.4s
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;CHECK-NOT: fmla.4s
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%tmp1 = load <4 x float>* %A
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%tmp2 = load <4 x float>* %B
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%tmp3 = load <4 x float>* %C
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%tmp4 = call <4 x float> @llvm.fmuladd.v4f32(<4 x float> %tmp1, <4 x float> %tmp2, <4 x float> %tmp3)
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ret <4 x float> %tmp4
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}
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define <8 x float> @test_v8f32(<8 x float>* %A, <8 x float>* %B, <8 x float>* %C) nounwind {
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;CHECK-LABEL: test_v8f32:
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;CHECK: fmla.4s
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;CHECK: fmla.4s
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;CHECK-NOT: fmla.4s
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%tmp1 = load <8 x float>* %A
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%tmp2 = load <8 x float>* %B
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%tmp3 = load <8 x float>* %C
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%tmp4 = call <8 x float> @llvm.fmuladd.v8f32(<8 x float> %tmp1, <8 x float> %tmp2, <8 x float> %tmp3)
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ret <8 x float> %tmp4
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}
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define double @test_f64(double* %A, double* %B, double* %C) nounwind {
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;CHECK-LABEL: test_f64:
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;CHECK: fmadd
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;CHECK-NOT: fmadd
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%tmp1 = load double* %A
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%tmp2 = load double* %B
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%tmp3 = load double* %C
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%tmp4 = call double @llvm.fmuladd.f64(double %tmp1, double %tmp2, double %tmp3)
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ret double %tmp4
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}
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define <2 x double> @test_v2f64(<2 x double>* %A, <2 x double>* %B, <2 x double>* %C) nounwind {
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;CHECK-LABEL: test_v2f64:
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;CHECK: fmla.2d
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;CHECK-NOT: fmla.2d
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%tmp1 = load <2 x double>* %A
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%tmp2 = load <2 x double>* %B
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%tmp3 = load <2 x double>* %C
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%tmp4 = call <2 x double> @llvm.fmuladd.v2f64(<2 x double> %tmp1, <2 x double> %tmp2, <2 x double> %tmp3)
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ret <2 x double> %tmp4
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}
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define <4 x double> @test_v4f64(<4 x double>* %A, <4 x double>* %B, <4 x double>* %C) nounwind {
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;CHECK-LABEL: test_v4f64:
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;CHECK: fmla.2d
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;CHECK: fmla.2d
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;CHECK-NOT: fmla.2d
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%tmp1 = load <4 x double>* %A
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%tmp2 = load <4 x double>* %B
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%tmp3 = load <4 x double>* %C
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%tmp4 = call <4 x double> @llvm.fmuladd.v4f64(<4 x double> %tmp1, <4 x double> %tmp2, <4 x double> %tmp3)
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ret <4 x double> %tmp4
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}
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declare float @llvm.fmuladd.f32(float, float, float) nounwind readnone
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declare <2 x float> @llvm.fmuladd.v2f32(<2 x float>, <2 x float>, <2 x float>) nounwind readnone
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declare <4 x float> @llvm.fmuladd.v4f32(<4 x float>, <4 x float>, <4 x float>) nounwind readnone
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declare <8 x float> @llvm.fmuladd.v8f32(<8 x float>, <8 x float>, <8 x float>) nounwind readnone
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declare double @llvm.fmuladd.f64(double, double, double) nounwind readnone
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declare <2 x double> @llvm.fmuladd.v2f64(<2 x double>, <2 x double>, <2 x double>) nounwind readnone
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declare <4 x double> @llvm.fmuladd.v4f64(<4 x double>, <4 x double>, <4 x double>) nounwind readnone
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