llvm-6502/test/CodeGen/ARM64/popcnt.ll
Tim Northover 7b837d8c75 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00

44 lines
1.0 KiB
LLVM

; RUN: llc < %s -march=arm64 -arm64-neon-syntax=apple | FileCheck %s
define i32 @cnt32_advsimd(i32 %x) nounwind readnone {
%cnt = tail call i32 @llvm.ctpop.i32(i32 %x)
ret i32 %cnt
; CHECK: fmov s0, w0
; CHECK: cnt.8b v0, v0
; CHECK: uaddlv.8b h0, v0
; CHECK: fmov w0, s0
; CHECK: ret
}
define i64 @cnt64_advsimd(i64 %x) nounwind readnone {
%cnt = tail call i64 @llvm.ctpop.i64(i64 %x)
ret i64 %cnt
; CHECK: fmov d0, x0
; CHECK: cnt.8b v0, v0
; CHECK: uaddlv.8b h0, v0
; CHECK: fmov w0, s0
; CHECK: ret
}
; Do not use AdvSIMD when -mno-implicit-float is specified.
; rdar://9473858
define i32 @cnt32(i32 %x) nounwind readnone noimplicitfloat {
%cnt = tail call i32 @llvm.ctpop.i32(i32 %x)
ret i32 %cnt
; CHECK-LABEL: cnt32:
; CHECK-NOT 16b
; CHECK: ret
}
define i64 @cnt64(i64 %x) nounwind readnone noimplicitfloat {
%cnt = tail call i64 @llvm.ctpop.i64(i64 %x)
ret i64 %cnt
; CHECK-LABEL: cnt64:
; CHECK-NOT 16b
; CHECK: ret
}
declare i32 @llvm.ctpop.i32(i32) nounwind readnone
declare i64 @llvm.ctpop.i64(i64) nounwind readnone