llvm-6502/test/CodeGen/ARM64/vaargs.ll
Tim Northover 7b837d8c75 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00

21 lines
621 B
LLVM

; RUN: llc < %s -march=arm64 | FileCheck %s
target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-n32:64"
target triple = "arm64-apple-darwin11.0.0"
define float @t1(i8* nocapture %fmt, ...) nounwind ssp {
entry:
; CHECK: t1
; CHECK: fcvt
%argp = alloca i8*, align 8
%argp1 = bitcast i8** %argp to i8*
call void @llvm.va_start(i8* %argp1)
%0 = va_arg i8** %argp, i32
%1 = va_arg i8** %argp, float
call void @llvm.va_end(i8* %argp1)
ret float %1
}
declare void @llvm.va_start(i8*) nounwind
declare void @llvm.va_end(i8*) nounwind