llvm-6502/test/CodeGen/ARM64/volatile.ll
Tim Northover 7b837d8c75 ARM64: initial backend import
This adds a second implementation of the AArch64 architecture to LLVM,
accessible in parallel via the "arm64" triple. The plan over the
coming weeks & months is to merge the two into a single backend,
during which time thorough code review should naturally occur.

Everything will be easier with the target in-tree though, hence this
commit.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@205090 91177308-0d34-0410-b5e6-96231b3b80d8
2014-03-29 10:18:08 +00:00

28 lines
812 B
LLVM

; RUN: llc < %s -march=arm64 | FileCheck %s
define i64 @normal_load(i64* nocapture %bar) nounwind readonly {
; CHECK: normal_load
; CHECK: ldp
; CHECK-NEXT: add
; CHECK-NEXT: ret
%add.ptr = getelementptr inbounds i64* %bar, i64 1
%tmp = load i64* %add.ptr, align 8
%add.ptr1 = getelementptr inbounds i64* %bar, i64 2
%tmp1 = load i64* %add.ptr1, align 8
%add = add nsw i64 %tmp1, %tmp
ret i64 %add
}
define i64 @volatile_load(i64* nocapture %bar) nounwind {
; CHECK: volatile_load
; CHECK: ldr
; CHECK-NEXT: ldr
; CHECK-NEXT: add
; CHECK-NEXT: ret
%add.ptr = getelementptr inbounds i64* %bar, i64 1
%tmp = load volatile i64* %add.ptr, align 8
%add.ptr1 = getelementptr inbounds i64* %bar, i64 2
%tmp1 = load volatile i64* %add.ptr1, align 8
%add = add nsw i64 %tmp1, %tmp
ret i64 %add
}