6502/llvm-6502
1
0
Fork 0
mirror of https://github.com/c64scene-ar/llvm-6502.git synced 2024-07-05 13:29:22 +00:00
Code Issues Projects Releases Wiki Activity
8ed205f0a3
llvm-6502/test/MC/Disassembler
History
Michael Liao 02d2e61252 Add CLAC/STAC instruction encoding/decoding support 
As these two instructions in AVX extension are privileged instructions for
special purpose, it's only expected to be used in inlined assembly.



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@179266 91177308-0d34-0410-b5e6-96231b3b80d8
2013-04-11 04:52:28 +00:00
..
AArch64 AArch64: implement ETMv4 trace system registers. 2013-04-03 12:31:29 +00:00
ARM ARM: Make "SMC" instructions conditional on new TrustZone architecture feature. 2013-04-10 12:08:35 +00:00
MBlaze
Mips This is a resubmittal. For some reason it broke the bots yesterday 2013-01-17 00:28:20 +00:00
X86 Add CLAC/STAC instruction encoding/decoding support 2013-04-11 04:52:28 +00:00
XCore [XCore] Add bru instruction. 2013-04-04 20:05:35 +00:00