llvm-6502/utils/TableGen/X86DisassemblerShared.h
Sean Callanan 8ed9f51663 Table-driven disassembler for the X86 architecture (16-, 32-, and 64-bit
incarnations), integrated into the MC framework.  

The disassembler is table-driven, using a custom TableGen backend to 
generate hierarchical tables optimized for fast decode.  The disassembler 
consumes MemoryObjects and produces arrays of MCInsts, adhering to the 
abstract base class MCDisassembler (llvm/MC/MCDisassembler.h).

The disassembler is documented in detail in

- lib/Target/X86/Disassembler/X86Disassembler.cpp (disassembler runtime)
- utils/TableGen/DisassemblerEmitter.cpp (table emitter)

You can test the disassembler by running llvm-mc -disassemble for i386
or x86_64 targets.  Please let me know if you encounter any problems
with it.


git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@91749 91177308-0d34-0410-b5e6-96231b3b80d8
2009-12-19 02:59:52 +00:00

38 lines
1.1 KiB
C++

//===- X86DisassemblerShared.h - Emitter shared header ----------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
// This file is distributed under the University of Illinois Open Source
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
#ifndef X86DISASSEMBLERSHARED_H
#define X86DISASSEMBLERSHARED_H
#include <string>
#define INSTRUCTION_SPECIFIER_FIELDS \
bool filtered; \
InstructionContext insnContext; \
std::string name; \
\
InstructionSpecifier() { \
filtered = false; \
insnContext = IC; \
name = ""; \
modifierType = MODIFIER_NONE; \
modifierBase = 0; \
bzero(operands, sizeof(operands)); \
}
#define INSTRUCTION_IDS \
InstrUID instructionIDs[256];
#include "../../lib/Target/X86/Disassembler/X86DisassemblerDecoderCommon.h"
#undef INSTRUCTION_SPECIFIER_FIELDS
#undef INSTRUCTION_IDS
#endif