llvm-6502/test/CodeGen/Mips/inlineasm_constraint_m.ll
Daniel Sanders 06426f54cb [mips] Support 16-bit offsets for 'm' inline assembly memory constraint.
Reviewers: vkalintiris

Reviewed By: vkalintiris

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D8435

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@233086 91177308-0d34-0410-b5e6-96231b3b80d8
2015-03-24 15:19:14 +00:00

62 lines
1.6 KiB
LLVM

; RUN: llc -march=mipsel < %s | FileCheck %s
@data = global [8193 x i32] zeroinitializer
define void @m(i32 *%p) nounwind {
entry:
; CHECK-LABEL: m:
call void asm sideeffect "lw $$1, $0", "*m,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 0))
; CHECK: lw $[[BASEPTR:[0-9]+]], %got(data)(
; CHECK: #APP
; CHECK: lw $1, 0($[[BASEPTR]])
; CHECK: #NO_APP
ret void
}
define void @m_offset_4(i32 *%p) nounwind {
entry:
; CHECK-LABEL: m_offset_4:
call void asm sideeffect "lw $$1, $0", "*m,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 1))
; CHECK: lw $[[BASEPTR:[0-9]+]], %got(data)(
; CHECK: #APP
; CHECK: lw $1, 4($[[BASEPTR]])
; CHECK: #NO_APP
ret void
}
define void @m_offset_32764(i32 *%p) nounwind {
entry:
; CHECK-LABEL: m_offset_32764:
call void asm sideeffect "lw $$1, $0", "*m,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 8191))
; CHECK-DAG: lw $[[BASEPTR:[0-9]+]], %got(data)(
; CHECK: #APP
; CHECK: lw $1, 32764($[[BASEPTR]])
; CHECK: #NO_APP
ret void
}
define void @m_offset_32768(i32 *%p) nounwind {
entry:
; CHECK-LABEL: m_offset_32768:
call void asm sideeffect "lw $$1, $0", "*m,~{$1}"(i32* getelementptr inbounds ([8193 x i32], [8193 x i32]* @data, i32 0, i32 8192))
; CHECK-DAG: lw $[[BASEPTR:[0-9]+]], %got(data)(
; CHECK-DAG: ori $[[T0:[0-9]+]], $zero, 32768
; CHECK: addu $[[BASEPTR2:[0-9]+]], $[[BASEPTR]], $[[T0]]
; CHECK: #APP
; CHECK: lw $1, 0($[[BASEPTR2]])
; CHECK: #NO_APP
ret void
}