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32b845d223
See r230786 and r230794 for similar changes to gep and load
respectively.
Call is a bit different because it often doesn't have a single explicit
type - usually the type is deduced from the arguments, and just the
return type is explicit. In those cases there's no need to change the
IR.
When that's not the case, the IR usually contains the pointer type of
the first operand - but since typed pointers are going away, that
representation is insufficient so I'm just stripping the "pointerness"
of the explicit type away.
This does make the IR a bit weird - it /sort of/ reads like the type of
the first operand: "call void () %x(" but %x is actually of type "void
()*" and will eventually be just of type "ptr". But this seems not too
bad and I don't think it would benefit from repeating the type
("void (), void () * %x(" and then eventually "void (), ptr %x(") as has
been done with gep and load.
This also has a side benefit: since the explicit type is no longer a
pointer, there's no ambiguity between an explicit type and a function
that returns a function pointer. Previously this case needed an explicit
type (eg: a function returning a void() function was written as
"call void () () * @x(" rather than "call void () * @x(" because of the
ambiguity between a function returning a pointer to a void() function
and a function returning void).
No ambiguity means even function pointer return types can just be
written alone, without writing the whole function's type.
This leaves /only/ the varargs case where the explicit type is required.
Given the special type syntax in call instructions, the regex-fu used
for migration was a bit more involved in its own unique way (as every
one of these is) so here it is. Use it in conjunction with the apply.sh
script and associated find/xargs commands I've provided in rr230786 to
migrate your out of tree tests. Do let me know if any of this doesn't
cover your cases & we can iterate on a more general script/regexes to
help others with out of tree tests.
About 9 test cases couldn't be automatically migrated - half of those
were functions returning function pointers, where I just had to manually
delete the function argument types now that we didn't need an explicit
function type there. The other half were typedefs of function types used
in calls - just had to manually drop the * from those.
import fileinput
import sys
import re
pat = re.compile(r'((?:=|:|^|\s)call\s(?:[^@]*?))(\s*$|\s*(?:(?:\[\[[a-zA-Z0-9_]+\]\]|[@%](?:(")?[\\\?@a-zA-Z0-9_.]*?(?(3)"|)|{{.*}}))(?:\(|$)|undef|inttoptr|bitcast|null|asm).*$)')
addrspace_end = re.compile(r"addrspace\(\d+\)\s*\*$")
func_end = re.compile("(?:void.*|\)\s*)\*$")
def conv(match, line):
if not match or re.search(addrspace_end, match.group(1)) or not re.search(func_end, match.group(1)):
return line
return line[:match.start()] + match.group(1)[:match.group(1).rfind('*')].rstrip() + match.group(2) + line[match.end():]
for line in sys.stdin:
sys.stdout.write(conv(re.search(pat, line), line))
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@235145 91177308-0d34-0410-b5e6-96231b3b80d8
245 lines
7.3 KiB
LLVM
245 lines
7.3 KiB
LLVM
; RUN: llc -march=mipsel < %s | FileCheck %s
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; Check that function accesses vector return value from stack in cases when
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; vector can't be returned in registers. Also check that caller passes in
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; register $4 stack address where the vector should be placed.
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declare <8 x i32> @i8(...)
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declare <4 x float> @f4(...)
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declare <4 x double> @d4(...)
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define i32 @call_i8() {
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entry:
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%call = call <8 x i32> (...) @i8()
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%v0 = extractelement <8 x i32> %call, i32 0
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%v1 = extractelement <8 x i32> %call, i32 1
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%v2 = extractelement <8 x i32> %call, i32 2
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%v3 = extractelement <8 x i32> %call, i32 3
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%v4 = extractelement <8 x i32> %call, i32 4
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%v5 = extractelement <8 x i32> %call, i32 5
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%v6 = extractelement <8 x i32> %call, i32 6
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%v7 = extractelement <8 x i32> %call, i32 7
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%add1 = add i32 %v0, %v1
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%add2 = add i32 %v2, %v3
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%add3 = add i32 %v4, %v5
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%add4 = add i32 %v6, %v7
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%add5 = add i32 %add1, %add2
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%add6 = add i32 %add3, %add4
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%add7 = add i32 %add5, %add6
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ret i32 %add7
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; CHECK-LABEL: call_i8:
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; CHECK: call16(i8)
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; CHECK: addiu $4, $sp, 32
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; CHECK: lw $[[R0:[a-z0-9]+]], 60($sp)
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; CHECK: lw $[[R1:[a-z0-9]+]], 56($sp)
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; CHECK: lw $[[R2:[a-z0-9]+]], 52($sp)
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; CHECK: lw $[[R3:[a-z0-9]+]], 48($sp)
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; CHECK: lw $[[R4:[a-z0-9]+]], 44($sp)
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; CHECK: lw $[[R5:[a-z0-9]+]], 40($sp)
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; CHECK: lw $[[R6:[a-z0-9]+]], 36($sp)
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; CHECK: lw $[[R7:[a-z0-9]+]], 32($sp)
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}
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define float @call_f4() {
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entry:
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%call = call <4 x float> (...) @f4()
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%v0 = extractelement <4 x float> %call, i32 0
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%v1 = extractelement <4 x float> %call, i32 1
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%v2 = extractelement <4 x float> %call, i32 2
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%v3 = extractelement <4 x float> %call, i32 3
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%add1 = fadd float %v0, %v1
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%add2 = fadd float %v2, %v3
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%add3 = fadd float %add1, %add2
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ret float %add3
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; CHECK-LABEL: call_f4:
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; CHECK: call16(f4)
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; CHECK: addiu $4, $sp, 16
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; CHECK: lwc1 $[[R0:[a-z0-9]+]], 28($sp)
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; CHECK: lwc1 $[[R1:[a-z0-9]+]], 24($sp)
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; CHECK: lwc1 $[[R3:[a-z0-9]+]], 20($sp)
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; CHECK: lwc1 $[[R4:[a-z0-9]+]], 16($sp)
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}
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define double @call_d4() {
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entry:
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%call = call <4 x double> (...) @d4()
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%v0 = extractelement <4 x double> %call, i32 0
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%v1 = extractelement <4 x double> %call, i32 1
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%v2 = extractelement <4 x double> %call, i32 2
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%v3 = extractelement <4 x double> %call, i32 3
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%add1 = fadd double %v0, %v1
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%add2 = fadd double %v2, %v3
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%add3 = fadd double %add1, %add2
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ret double %add3
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; CHECK-LABEL: call_d4:
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; CHECK: call16(d4)
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; CHECK: addiu $4, $sp, 32
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; CHECK: ldc1 $[[R0:[a-z0-9]+]], 56($sp)
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; CHECK: ldc1 $[[R1:[a-z0-9]+]], 48($sp)
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; CHECK: ldc1 $[[R3:[a-z0-9]+]], 40($sp)
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; CHECK: ldc1 $[[R4:[a-z0-9]+]], 32($sp)
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}
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; Check that function accesses vector return value from registers in cases when
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; vector can be returned in registers
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declare <4 x i32> @i4(...)
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declare <2 x float> @f2(...)
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declare <2 x double> @d2(...)
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define i32 @call_i4() {
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entry:
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%call = call <4 x i32> (...) @i4()
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%v0 = extractelement <4 x i32> %call, i32 0
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%v1 = extractelement <4 x i32> %call, i32 1
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%v2 = extractelement <4 x i32> %call, i32 2
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%v3 = extractelement <4 x i32> %call, i32 3
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%add1 = add i32 %v0, %v1
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%add2 = add i32 %v2, %v3
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%add3 = add i32 %add1, %add2
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ret i32 %add3
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; CHECK-LABEL: call_i4:
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; CHECK: call16(i4)
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; CHECK-NOT: lw
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; CHECK: addu $[[R2:[a-z0-9]+]], $[[R0:[a-z0-9]+]], $[[R1:[a-z0-9]+]]
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; CHECK: addu $[[R5:[a-z0-9]+]], $[[R3:[a-z0-9]+]], $[[R4:[a-z0-9]+]]
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; CHECK: addu $[[R6:[a-z0-9]+]], $[[R5]], $[[R2]]
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}
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define float @call_f2() {
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entry:
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%call = call <2 x float> (...) @f2()
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%v0 = extractelement <2 x float> %call, i32 0
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%v1 = extractelement <2 x float> %call, i32 1
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%add1 = fadd float %v0, %v1
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ret float %add1
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; CHECK-LABEL: call_f2:
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; CHECK: call16(f2)
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; CHECK-NOT: lwc1
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; CHECK: add.s $[[R2:[a-z0-9]+]], $[[R0:[a-z0-9]+]], $[[R1:[a-z0-9]+]]
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}
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define double @call_d2() {
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entry:
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%call = call <2 x double> (...) @d2()
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%v0 = extractelement <2 x double> %call, i32 0
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%v1 = extractelement <2 x double> %call, i32 1
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%add1 = fadd double %v0, %v1
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ret double %add1
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; CHECK-LABEL: call_d2:
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; CHECK: call16(d2)
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; CHECK-NOT: ldc1
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; CHECK: add.d $[[R2:[a-z0-9]+]], $[[R0:[a-z0-9]+]], $[[R1:[a-z0-9]+]]
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}
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; Check that function returns vector on stack in cases when vector can't be
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; returned in registers. Also check that vector is placed on stack starting
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; from the address in register $4.
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define <8 x i32> @return_i8() {
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entry:
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ret <8 x i32> <i32 0, i32 1, i32 2, i32 3, i32 4, i32 5, i32 6, i32 7>
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; CHECK-LABEL: return_i8:
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; CHECK: sw $[[R0:[a-z0-9]+]], 28($4)
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; CHECK: sw $[[R1:[a-z0-9]+]], 24($4)
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; CHECK: sw $[[R2:[a-z0-9]+]], 20($4)
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; CHECK: sw $[[R3:[a-z0-9]+]], 16($4)
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; CHECK: sw $[[R4:[a-z0-9]+]], 12($4)
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; CHECK: sw $[[R5:[a-z0-9]+]], 8($4)
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; CHECK: sw $[[R6:[a-z0-9]+]], 4($4)
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; CHECK: sw $[[R7:[a-z0-9]+]], 0($4)
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}
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define <4 x float> @return_f4(float %a, float %b, float %c, float %d) {
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entry:
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%vecins1 = insertelement <4 x float> undef, float %a, i32 0
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%vecins2 = insertelement <4 x float> %vecins1, float %b, i32 1
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%vecins3 = insertelement <4 x float> %vecins2, float %c, i32 2
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%vecins4 = insertelement <4 x float> %vecins3, float %d, i32 3
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ret <4 x float> %vecins4
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; CHECK-LABEL: return_f4:
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; CHECK-DAG: lwc1 $[[R0:[a-z0-9]+]], 16($sp)
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; CHECK-DAG: swc1 $[[R0]], 12($4)
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; CHECK-DAG: sw $7, 8($4)
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; CHECK-DAG: sw $6, 4($4)
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; CHECK-DAG: sw $5, 0($4)
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}
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define <4 x double> @return_d4(double %a, double %b, double %c, double %d) {
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entry:
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%vecins1 = insertelement <4 x double> undef, double %a, i32 0
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%vecins2 = insertelement <4 x double> %vecins1, double %b, i32 1
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%vecins3 = insertelement <4 x double> %vecins2, double %c, i32 2
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%vecins4 = insertelement <4 x double> %vecins3, double %d, i32 3
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ret <4 x double> %vecins4
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; CHECK-LABEL: return_d4:
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; CHECK-DAG: sdc1 $[[R0:[a-z0-9]+]], 24($4)
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; CHECK-DAG: sdc1 $[[R1:[a-z0-9]+]], 16($4)
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; CHECK-DAG: sdc1 $[[R2:[a-z0-9]+]], 8($4)
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; CHECK-DAG: sdc1 $[[R3:[a-z0-9]+]], 0($4)
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}
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; Check that function returns vector in registers in cases when vector can be
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; returned in registers.
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define <4 x i32> @return_i4() {
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entry:
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ret <4 x i32> <i32 0, i32 1, i32 2, i32 3>
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; CHECK-LABEL: return_i4:
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; CHECK: addiu $2, $zero, 0
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; CHECK: addiu $3, $zero, 1
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; CHECK: addiu $4, $zero, 2
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; CHECK: addiu $5, $zero, 3
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}
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define <2 x float> @return_f2(float %a, float %b) {
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entry:
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%vecins1 = insertelement <2 x float> undef, float %a, i32 0
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%vecins2 = insertelement <2 x float> %vecins1, float %b, i32 1
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ret <2 x float> %vecins2
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; CHECK-LABEL: return_f2:
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; CHECK: mov.s $f0, $f12
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; CHECK: mov.s $f2, $f14
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}
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define <2 x double> @return_d2(double %a, double %b) {
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entry:
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%vecins1 = insertelement <2 x double> undef, double %a, i32 0
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%vecins2 = insertelement <2 x double> %vecins1, double %b, i32 1
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ret <2 x double> %vecins2
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; CHECK-LABEL: return_d2:
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; CHECK: mov.d $f0, $f12
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; CHECK: mov.d $f2, $f14
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}
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