mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-16 11:30:51 +00:00
7c9c6ed761
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@230794 91177308-0d34-0410-b5e6-96231b3b80d8
116 lines
4.2 KiB
LLVM
116 lines
4.2 KiB
LLVM
; RUN: llc -march=amdgcn -mcpu=SI -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI -check-prefix=FUNC %s
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declare i32 @llvm.bswap.i32(i32) nounwind readnone
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declare <2 x i32> @llvm.bswap.v2i32(<2 x i32>) nounwind readnone
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declare <4 x i32> @llvm.bswap.v4i32(<4 x i32>) nounwind readnone
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declare <8 x i32> @llvm.bswap.v8i32(<8 x i32>) nounwind readnone
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declare i64 @llvm.bswap.i64(i64) nounwind readnone
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declare <2 x i64> @llvm.bswap.v2i64(<2 x i64>) nounwind readnone
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declare <4 x i64> @llvm.bswap.v4i64(<4 x i64>) nounwind readnone
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; FUNC-LABEL: @test_bswap_i32
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; SI: buffer_load_dword [[VAL:v[0-9]+]]
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; SI-DAG: v_alignbit_b32 [[TMP0:v[0-9]+]], [[VAL]], [[VAL]], 8
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; SI-DAG: v_alignbit_b32 [[TMP1:v[0-9]+]], [[VAL]], [[VAL]], 24
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; SI-DAG: s_mov_b32 [[K:s[0-9]+]], 0xff00ff
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; SI: v_bfi_b32 [[RESULT:v[0-9]+]], [[K]], [[TMP1]], [[TMP0]]
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; SI: buffer_store_dword [[RESULT]]
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; SI: s_endpgm
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define void @test_bswap_i32(i32 addrspace(1)* %out, i32 addrspace(1)* %in) nounwind {
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%val = load i32, i32 addrspace(1)* %in, align 4
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%bswap = call i32 @llvm.bswap.i32(i32 %val) nounwind readnone
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store i32 %bswap, i32 addrspace(1)* %out, align 4
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ret void
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}
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; FUNC-LABEL: @test_bswap_v2i32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI: s_endpgm
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define void @test_bswap_v2i32(<2 x i32> addrspace(1)* %out, <2 x i32> addrspace(1)* %in) nounwind {
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%val = load <2 x i32>, <2 x i32> addrspace(1)* %in, align 8
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%bswap = call <2 x i32> @llvm.bswap.v2i32(<2 x i32> %val) nounwind readnone
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store <2 x i32> %bswap, <2 x i32> addrspace(1)* %out, align 8
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ret void
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}
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; FUNC-LABEL: @test_bswap_v4i32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI: s_endpgm
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define void @test_bswap_v4i32(<4 x i32> addrspace(1)* %out, <4 x i32> addrspace(1)* %in) nounwind {
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%val = load <4 x i32>, <4 x i32> addrspace(1)* %in, align 16
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%bswap = call <4 x i32> @llvm.bswap.v4i32(<4 x i32> %val) nounwind readnone
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store <4 x i32> %bswap, <4 x i32> addrspace(1)* %out, align 16
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ret void
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}
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; FUNC-LABEL: @test_bswap_v8i32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_alignbit_b32
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; SI-DAG: v_bfi_b32
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; SI: s_endpgm
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define void @test_bswap_v8i32(<8 x i32> addrspace(1)* %out, <8 x i32> addrspace(1)* %in) nounwind {
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%val = load <8 x i32>, <8 x i32> addrspace(1)* %in, align 32
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%bswap = call <8 x i32> @llvm.bswap.v8i32(<8 x i32> %val) nounwind readnone
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store <8 x i32> %bswap, <8 x i32> addrspace(1)* %out, align 32
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ret void
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}
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define void @test_bswap_i64(i64 addrspace(1)* %out, i64 addrspace(1)* %in) nounwind {
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%val = load i64, i64 addrspace(1)* %in, align 8
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%bswap = call i64 @llvm.bswap.i64(i64 %val) nounwind readnone
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store i64 %bswap, i64 addrspace(1)* %out, align 8
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ret void
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}
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define void @test_bswap_v2i64(<2 x i64> addrspace(1)* %out, <2 x i64> addrspace(1)* %in) nounwind {
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%val = load <2 x i64>, <2 x i64> addrspace(1)* %in, align 16
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%bswap = call <2 x i64> @llvm.bswap.v2i64(<2 x i64> %val) nounwind readnone
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store <2 x i64> %bswap, <2 x i64> addrspace(1)* %out, align 16
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ret void
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}
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define void @test_bswap_v4i64(<4 x i64> addrspace(1)* %out, <4 x i64> addrspace(1)* %in) nounwind {
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%val = load <4 x i64>, <4 x i64> addrspace(1)* %in, align 32
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%bswap = call <4 x i64> @llvm.bswap.v4i64(<4 x i64> %val) nounwind readnone
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store <4 x i64> %bswap, <4 x i64> addrspace(1)* %out, align 32
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ret void
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}
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