Chad Rosier 8f0f458824 [ARM64][fast-isel] Disable target specific optimizations at -O0. Functionally, ... this patch disables the dead register elimination pass and the load/store pair optimization pass at -O0. The ILP optimizations don't require the optimization level to be checked because the call to addILPOpts is predicated with the necessary check. The AdvSIMDScalar pass is disabled by default at all optimization levels. This patch leaves that pass disabled by default. Also, move command-line options into ARM64TargetMachine.cpp and add a few additional flags to aid in debugging. This fixes an issue with the -debug-pass=Structure flag where passes were printed, but not actually run (i.e., AdvSIMDScalar pass). git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@208223 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-07 16:41:55 +00:00
..
Analysis	[C++11] Add NArySCEV->Operands iterator range	2014-05-07 06:07:47 +00:00
AsmParser
Bitcode
CodeGen	Remove the UseCFI option from createAsmStreamer.	2014-05-07 13:00:43 +00:00
DebugInfo
ExecutionEngine
IR	llvm-cov: Explicitly namespace llvm::make_unique to keep MSVC happy	2014-05-07 16:01:27 +00:00
IRReader
LineEditor
Linker	Be more strict about not calling setAlignment on global aliases.	2014-05-06 14:51:36 +00:00
LTO
MC	Remove the UseCFI option from createAsmStreamer.	2014-05-07 13:00:43 +00:00
Object
Option
ProfileData
Support	[Support/MemoryBuffer] Remove the assertion that the file size did not shrink.	2014-05-06 23:30:56 +00:00
TableGen	[tablegen] Add !listconcat operator with the similar semantics as !strconcat	2014-05-07 10:13:19 +00:00
Target	[ARM64][fast-isel] Disable target specific optimizations at -O0. Functionally,	2014-05-07 16:41:55 +00:00
Transforms	[InstCombine] Add optimization of redundant insertvalue instructions.	2014-05-07 14:30:18 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile