Suyog Sarda ca72befdb5 Vectorize a reduction chain feeding into a 'return' statement. ...

e.x 
return (a[0]+b[0]) + (a[1]+b[1])

Differential Revision: http://reviews.llvm.org/D6227



git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222364 91177308-0d34-0410-b5e6-96231b3b80d8

2014-11-19 16:07:38 +00:00

..

AArch64

[AArch64] Improve cost model to handle sdiv by a pow-of-two.

2014-09-29 13:59:31 +00:00

ARM

Preserve IR flags (nsw, nuw, exact, fast-math) in SLP vectorizer (PR20802).

2014-09-03 17:40:30 +00:00

R600

…

X86

Vectorize a reduction chain feeding into a 'return' statement.

2014-11-19 16:07:38 +00:00

XCore

…