mirror of
https://github.com/c64scene-ar/llvm-6502.git
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8f637adbd3
Aside from the question of whether we report a warning or an error when we can't satisfy a requested stack object alignment, the current implementation of this is not good. We're not providing any source location in the diagnostics and the current warning is not connected to any warning group so you can't control it. We could improve the source location somewhat, but we can do a much better job if this check is implemented in the front-end, so let's do that instead. <rdar://problem/13127907> git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174741 91177308-0d34-0410-b5e6-96231b3b80d8
484 lines
18 KiB
C++
484 lines
18 KiB
C++
//===-- FunctionLoweringInfo.cpp ------------------------------------------===//
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//
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// The LLVM Compiler Infrastructure
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//
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// This file is distributed under the University of Illinois Open Source
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// License. See LICENSE.TXT for details.
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//
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//===----------------------------------------------------------------------===//
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//
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// This implements routines for translating functions from LLVM IR into
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// Machine IR.
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//
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//===----------------------------------------------------------------------===//
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#define DEBUG_TYPE "function-lowering-info"
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#include "llvm/CodeGen/FunctionLoweringInfo.h"
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#include "llvm/ADT/PostOrderIterator.h"
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#include "llvm/CodeGen/Analysis.h"
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#include "llvm/CodeGen/MachineFrameInfo.h"
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#include "llvm/CodeGen/MachineFunction.h"
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#include "llvm/CodeGen/MachineInstrBuilder.h"
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#include "llvm/CodeGen/MachineModuleInfo.h"
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#include "llvm/CodeGen/MachineRegisterInfo.h"
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#include "llvm/DebugInfo.h"
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#include "llvm/IR/DataLayout.h"
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#include "llvm/IR/DerivedTypes.h"
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#include "llvm/IR/Function.h"
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#include "llvm/IR/Instructions.h"
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#include "llvm/IR/IntrinsicInst.h"
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#include "llvm/IR/LLVMContext.h"
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#include "llvm/IR/Module.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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#include "llvm/Support/MathExtras.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Target/TargetLowering.h"
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#include "llvm/Target/TargetOptions.h"
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#include "llvm/Target/TargetRegisterInfo.h"
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#include <algorithm>
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using namespace llvm;
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/// isUsedOutsideOfDefiningBlock - Return true if this instruction is used by
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/// PHI nodes or outside of the basic block that defines it, or used by a
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/// switch or atomic instruction, which may expand to multiple basic blocks.
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static bool isUsedOutsideOfDefiningBlock(const Instruction *I) {
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if (I->use_empty()) return false;
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if (isa<PHINode>(I)) return true;
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const BasicBlock *BB = I->getParent();
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for (Value::const_use_iterator UI = I->use_begin(), E = I->use_end();
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UI != E; ++UI) {
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const User *U = *UI;
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if (cast<Instruction>(U)->getParent() != BB || isa<PHINode>(U))
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return true;
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}
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return false;
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}
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FunctionLoweringInfo::FunctionLoweringInfo(const TargetLowering &tli)
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: TLI(tli) {
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}
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void FunctionLoweringInfo::set(const Function &fn, MachineFunction &mf) {
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Fn = &fn;
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MF = &mf;
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RegInfo = &MF->getRegInfo();
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// Check whether the function can return without sret-demotion.
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SmallVector<ISD::OutputArg, 4> Outs;
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GetReturnInfo(Fn->getReturnType(), Fn->getAttributes(), Outs, TLI);
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CanLowerReturn = TLI.CanLowerReturn(Fn->getCallingConv(), *MF,
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Fn->isVarArg(),
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Outs, Fn->getContext());
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// Initialize the mapping of values to registers. This is only set up for
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// instruction values that are used outside of the block that defines
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// them.
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Function::const_iterator BB = Fn->begin(), EB = Fn->end();
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for (BasicBlock::const_iterator I = BB->begin(), E = BB->end(); I != E; ++I)
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if (const AllocaInst *AI = dyn_cast<AllocaInst>(I))
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if (const ConstantInt *CUI = dyn_cast<ConstantInt>(AI->getArraySize())) {
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Type *Ty = AI->getAllocatedType();
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uint64_t TySize = TLI.getDataLayout()->getTypeAllocSize(Ty);
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unsigned Align =
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std::max((unsigned)TLI.getDataLayout()->getPrefTypeAlignment(Ty),
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AI->getAlignment());
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TySize *= CUI->getZExtValue(); // Get total allocated size.
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if (TySize == 0) TySize = 1; // Don't create zero-sized stack objects.
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// The object may need to be placed onto the stack near the stack
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// protector if one exists. Determine here if this object is a suitable
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// candidate. I.e., it would trigger the creation of a stack protector.
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bool MayNeedSP =
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(AI->isArrayAllocation() ||
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(TySize >= 8 && isa<ArrayType>(Ty) &&
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cast<ArrayType>(Ty)->getElementType()->isIntegerTy(8)));
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StaticAllocaMap[AI] =
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MF->getFrameInfo()->CreateStackObject(TySize, Align, false,
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MayNeedSP, AI);
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}
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for (; BB != EB; ++BB)
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for (BasicBlock::const_iterator I = BB->begin(), E = BB->end();
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I != E; ++I) {
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// Mark values used outside their block as exported, by allocating
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// a virtual register for them.
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if (isUsedOutsideOfDefiningBlock(I))
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if (!isa<AllocaInst>(I) ||
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!StaticAllocaMap.count(cast<AllocaInst>(I)))
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InitializeRegForValue(I);
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// Collect llvm.dbg.declare information. This is done now instead of
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// during the initial isel pass through the IR so that it is done
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// in a predictable order.
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if (const DbgDeclareInst *DI = dyn_cast<DbgDeclareInst>(I)) {
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MachineModuleInfo &MMI = MF->getMMI();
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if (MMI.hasDebugInfo() &&
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DIVariable(DI->getVariable()).Verify() &&
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!DI->getDebugLoc().isUnknown()) {
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// Don't handle byval struct arguments or VLAs, for example.
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// Non-byval arguments are handled here (they refer to the stack
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// temporary alloca at this point).
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const Value *Address = DI->getAddress();
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if (Address) {
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if (const BitCastInst *BCI = dyn_cast<BitCastInst>(Address))
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Address = BCI->getOperand(0);
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if (const AllocaInst *AI = dyn_cast<AllocaInst>(Address)) {
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DenseMap<const AllocaInst *, int>::iterator SI =
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StaticAllocaMap.find(AI);
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if (SI != StaticAllocaMap.end()) { // Check for VLAs.
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int FI = SI->second;
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MMI.setVariableDbgInfo(DI->getVariable(),
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FI, DI->getDebugLoc());
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}
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}
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}
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}
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}
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}
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// Create an initial MachineBasicBlock for each LLVM BasicBlock in F. This
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// also creates the initial PHI MachineInstrs, though none of the input
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// operands are populated.
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for (BB = Fn->begin(); BB != EB; ++BB) {
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MachineBasicBlock *MBB = mf.CreateMachineBasicBlock(BB);
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MBBMap[BB] = MBB;
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MF->push_back(MBB);
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// Transfer the address-taken flag. This is necessary because there could
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// be multiple MachineBasicBlocks corresponding to one BasicBlock, and only
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// the first one should be marked.
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if (BB->hasAddressTaken())
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MBB->setHasAddressTaken();
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// Create Machine PHI nodes for LLVM PHI nodes, lowering them as
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// appropriate.
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for (BasicBlock::const_iterator I = BB->begin();
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const PHINode *PN = dyn_cast<PHINode>(I); ++I) {
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if (PN->use_empty()) continue;
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// Skip empty types
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if (PN->getType()->isEmptyTy())
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continue;
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DebugLoc DL = PN->getDebugLoc();
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unsigned PHIReg = ValueMap[PN];
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assert(PHIReg && "PHI node does not have an assigned virtual register!");
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SmallVector<EVT, 4> ValueVTs;
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ComputeValueVTs(TLI, PN->getType(), ValueVTs);
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for (unsigned vti = 0, vte = ValueVTs.size(); vti != vte; ++vti) {
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EVT VT = ValueVTs[vti];
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unsigned NumRegisters = TLI.getNumRegisters(Fn->getContext(), VT);
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const TargetInstrInfo *TII = MF->getTarget().getInstrInfo();
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for (unsigned i = 0; i != NumRegisters; ++i)
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BuildMI(MBB, DL, TII->get(TargetOpcode::PHI), PHIReg + i);
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PHIReg += NumRegisters;
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}
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}
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}
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// Mark landing pad blocks.
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for (BB = Fn->begin(); BB != EB; ++BB)
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if (const InvokeInst *Invoke = dyn_cast<InvokeInst>(BB->getTerminator()))
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MBBMap[Invoke->getSuccessor(1)]->setIsLandingPad();
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}
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/// clear - Clear out all the function-specific state. This returns this
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/// FunctionLoweringInfo to an empty state, ready to be used for a
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/// different function.
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void FunctionLoweringInfo::clear() {
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assert(CatchInfoFound.size() == CatchInfoLost.size() &&
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"Not all catch info was assigned to a landing pad!");
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MBBMap.clear();
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ValueMap.clear();
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StaticAllocaMap.clear();
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#ifndef NDEBUG
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CatchInfoLost.clear();
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CatchInfoFound.clear();
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#endif
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LiveOutRegInfo.clear();
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VisitedBBs.clear();
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ArgDbgValues.clear();
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ByValArgFrameIndexMap.clear();
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RegFixups.clear();
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}
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/// CreateReg - Allocate a single virtual register for the given type.
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unsigned FunctionLoweringInfo::CreateReg(MVT VT) {
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return RegInfo->createVirtualRegister(TLI.getRegClassFor(VT));
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}
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/// CreateRegs - Allocate the appropriate number of virtual registers of
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/// the correctly promoted or expanded types. Assign these registers
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/// consecutive vreg numbers and return the first assigned number.
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///
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/// In the case that the given value has struct or array type, this function
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/// will assign registers for each member or element.
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///
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unsigned FunctionLoweringInfo::CreateRegs(Type *Ty) {
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SmallVector<EVT, 4> ValueVTs;
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ComputeValueVTs(TLI, Ty, ValueVTs);
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unsigned FirstReg = 0;
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for (unsigned Value = 0, e = ValueVTs.size(); Value != e; ++Value) {
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EVT ValueVT = ValueVTs[Value];
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MVT RegisterVT = TLI.getRegisterType(Ty->getContext(), ValueVT);
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unsigned NumRegs = TLI.getNumRegisters(Ty->getContext(), ValueVT);
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for (unsigned i = 0; i != NumRegs; ++i) {
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unsigned R = CreateReg(RegisterVT);
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if (!FirstReg) FirstReg = R;
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}
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}
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return FirstReg;
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}
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/// GetLiveOutRegInfo - Gets LiveOutInfo for a register, returning NULL if the
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/// register is a PHI destination and the PHI's LiveOutInfo is not valid. If
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/// the register's LiveOutInfo is for a smaller bit width, it is extended to
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/// the larger bit width by zero extension. The bit width must be no smaller
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/// than the LiveOutInfo's existing bit width.
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const FunctionLoweringInfo::LiveOutInfo *
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FunctionLoweringInfo::GetLiveOutRegInfo(unsigned Reg, unsigned BitWidth) {
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if (!LiveOutRegInfo.inBounds(Reg))
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return NULL;
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LiveOutInfo *LOI = &LiveOutRegInfo[Reg];
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if (!LOI->IsValid)
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return NULL;
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if (BitWidth > LOI->KnownZero.getBitWidth()) {
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LOI->NumSignBits = 1;
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LOI->KnownZero = LOI->KnownZero.zextOrTrunc(BitWidth);
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LOI->KnownOne = LOI->KnownOne.zextOrTrunc(BitWidth);
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}
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return LOI;
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}
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/// ComputePHILiveOutRegInfo - Compute LiveOutInfo for a PHI's destination
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/// register based on the LiveOutInfo of its operands.
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void FunctionLoweringInfo::ComputePHILiveOutRegInfo(const PHINode *PN) {
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Type *Ty = PN->getType();
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if (!Ty->isIntegerTy() || Ty->isVectorTy())
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return;
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SmallVector<EVT, 1> ValueVTs;
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ComputeValueVTs(TLI, Ty, ValueVTs);
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assert(ValueVTs.size() == 1 &&
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"PHIs with non-vector integer types should have a single VT.");
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EVT IntVT = ValueVTs[0];
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if (TLI.getNumRegisters(PN->getContext(), IntVT) != 1)
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return;
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IntVT = TLI.getTypeToTransformTo(PN->getContext(), IntVT);
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unsigned BitWidth = IntVT.getSizeInBits();
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unsigned DestReg = ValueMap[PN];
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if (!TargetRegisterInfo::isVirtualRegister(DestReg))
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return;
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LiveOutRegInfo.grow(DestReg);
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LiveOutInfo &DestLOI = LiveOutRegInfo[DestReg];
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Value *V = PN->getIncomingValue(0);
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if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
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DestLOI.NumSignBits = 1;
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APInt Zero(BitWidth, 0);
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DestLOI.KnownZero = Zero;
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DestLOI.KnownOne = Zero;
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return;
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}
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if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
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APInt Val = CI->getValue().zextOrTrunc(BitWidth);
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DestLOI.NumSignBits = Val.getNumSignBits();
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DestLOI.KnownZero = ~Val;
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DestLOI.KnownOne = Val;
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} else {
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assert(ValueMap.count(V) && "V should have been placed in ValueMap when its"
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"CopyToReg node was created.");
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unsigned SrcReg = ValueMap[V];
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if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
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DestLOI.IsValid = false;
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return;
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}
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const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
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if (!SrcLOI) {
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DestLOI.IsValid = false;
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return;
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}
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DestLOI = *SrcLOI;
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}
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assert(DestLOI.KnownZero.getBitWidth() == BitWidth &&
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DestLOI.KnownOne.getBitWidth() == BitWidth &&
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"Masks should have the same bit width as the type.");
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for (unsigned i = 1, e = PN->getNumIncomingValues(); i != e; ++i) {
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Value *V = PN->getIncomingValue(i);
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if (isa<UndefValue>(V) || isa<ConstantExpr>(V)) {
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DestLOI.NumSignBits = 1;
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APInt Zero(BitWidth, 0);
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DestLOI.KnownZero = Zero;
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DestLOI.KnownOne = Zero;
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return;
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}
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if (ConstantInt *CI = dyn_cast<ConstantInt>(V)) {
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APInt Val = CI->getValue().zextOrTrunc(BitWidth);
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DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, Val.getNumSignBits());
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DestLOI.KnownZero &= ~Val;
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DestLOI.KnownOne &= Val;
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continue;
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}
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assert(ValueMap.count(V) && "V should have been placed in ValueMap when "
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"its CopyToReg node was created.");
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unsigned SrcReg = ValueMap[V];
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if (!TargetRegisterInfo::isVirtualRegister(SrcReg)) {
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DestLOI.IsValid = false;
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return;
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}
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const LiveOutInfo *SrcLOI = GetLiveOutRegInfo(SrcReg, BitWidth);
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if (!SrcLOI) {
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DestLOI.IsValid = false;
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return;
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}
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DestLOI.NumSignBits = std::min(DestLOI.NumSignBits, SrcLOI->NumSignBits);
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DestLOI.KnownZero &= SrcLOI->KnownZero;
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DestLOI.KnownOne &= SrcLOI->KnownOne;
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}
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}
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/// setArgumentFrameIndex - Record frame index for the byval
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/// argument. This overrides previous frame index entry for this argument,
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/// if any.
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void FunctionLoweringInfo::setArgumentFrameIndex(const Argument *A,
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int FI) {
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ByValArgFrameIndexMap[A] = FI;
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}
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/// getArgumentFrameIndex - Get frame index for the byval argument.
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/// If the argument does not have any assigned frame index then 0 is
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/// returned.
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int FunctionLoweringInfo::getArgumentFrameIndex(const Argument *A) {
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DenseMap<const Argument *, int>::iterator I =
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ByValArgFrameIndexMap.find(A);
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if (I != ByValArgFrameIndexMap.end())
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return I->second;
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DEBUG(dbgs() << "Argument does not have assigned frame index!\n");
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return 0;
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}
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/// ComputeUsesVAFloatArgument - Determine if any floating-point values are
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/// being passed to this variadic function, and set the MachineModuleInfo's
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/// usesVAFloatArgument flag if so. This flag is used to emit an undefined
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/// reference to _fltused on Windows, which will link in MSVCRT's
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/// floating-point support.
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void llvm::ComputeUsesVAFloatArgument(const CallInst &I,
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MachineModuleInfo *MMI)
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{
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FunctionType *FT = cast<FunctionType>(
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I.getCalledValue()->getType()->getContainedType(0));
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if (FT->isVarArg() && !MMI->usesVAFloatArgument()) {
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for (unsigned i = 0, e = I.getNumArgOperands(); i != e; ++i) {
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Type* T = I.getArgOperand(i)->getType();
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for (po_iterator<Type*> i = po_begin(T), e = po_end(T);
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i != e; ++i) {
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if (i->isFloatingPointTy()) {
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MMI->setUsesVAFloatArgument(true);
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return;
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}
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}
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}
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}
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}
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/// AddCatchInfo - Extract the personality and type infos from an eh.selector
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/// call, and add them to the specified machine basic block.
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void llvm::AddCatchInfo(const CallInst &I, MachineModuleInfo *MMI,
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MachineBasicBlock *MBB) {
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// Inform the MachineModuleInfo of the personality for this landing pad.
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const ConstantExpr *CE = cast<ConstantExpr>(I.getArgOperand(1));
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assert(CE->getOpcode() == Instruction::BitCast &&
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isa<Function>(CE->getOperand(0)) &&
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"Personality should be a function");
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MMI->addPersonality(MBB, cast<Function>(CE->getOperand(0)));
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// Gather all the type infos for this landing pad and pass them along to
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// MachineModuleInfo.
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std::vector<const GlobalVariable *> TyInfo;
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unsigned N = I.getNumArgOperands();
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for (unsigned i = N - 1; i > 1; --i) {
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if (const ConstantInt *CI = dyn_cast<ConstantInt>(I.getArgOperand(i))) {
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unsigned FilterLength = CI->getZExtValue();
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unsigned FirstCatch = i + FilterLength + !FilterLength;
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assert(FirstCatch <= N && "Invalid filter length");
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if (FirstCatch < N) {
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TyInfo.reserve(N - FirstCatch);
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for (unsigned j = FirstCatch; j < N; ++j)
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TyInfo.push_back(ExtractTypeInfo(I.getArgOperand(j)));
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MMI->addCatchTypeInfo(MBB, TyInfo);
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TyInfo.clear();
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}
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if (!FilterLength) {
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// Cleanup.
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MMI->addCleanup(MBB);
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} else {
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// Filter.
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TyInfo.reserve(FilterLength - 1);
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for (unsigned j = i + 1; j < FirstCatch; ++j)
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TyInfo.push_back(ExtractTypeInfo(I.getArgOperand(j)));
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MMI->addFilterTypeInfo(MBB, TyInfo);
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TyInfo.clear();
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}
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N = i;
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}
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}
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if (N > 2) {
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TyInfo.reserve(N - 2);
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for (unsigned j = 2; j < N; ++j)
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TyInfo.push_back(ExtractTypeInfo(I.getArgOperand(j)));
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MMI->addCatchTypeInfo(MBB, TyInfo);
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|
}
|
|
}
|
|
|
|
/// AddLandingPadInfo - Extract the exception handling information from the
|
|
/// landingpad instruction and add them to the specified machine module info.
|
|
void llvm::AddLandingPadInfo(const LandingPadInst &I, MachineModuleInfo &MMI,
|
|
MachineBasicBlock *MBB) {
|
|
MMI.addPersonality(MBB,
|
|
cast<Function>(I.getPersonalityFn()->stripPointerCasts()));
|
|
|
|
if (I.isCleanup())
|
|
MMI.addCleanup(MBB);
|
|
|
|
// FIXME: New EH - Add the clauses in reverse order. This isn't 100% correct,
|
|
// but we need to do it this way because of how the DWARF EH emitter
|
|
// processes the clauses.
|
|
for (unsigned i = I.getNumClauses(); i != 0; --i) {
|
|
Value *Val = I.getClause(i - 1);
|
|
if (I.isCatch(i - 1)) {
|
|
MMI.addCatchTypeInfo(MBB,
|
|
dyn_cast<GlobalVariable>(Val->stripPointerCasts()));
|
|
} else {
|
|
// Add filters in a list.
|
|
Constant *CVal = cast<Constant>(Val);
|
|
SmallVector<const GlobalVariable*, 4> FilterList;
|
|
for (User::op_iterator
|
|
II = CVal->op_begin(), IE = CVal->op_end(); II != IE; ++II)
|
|
FilterList.push_back(cast<GlobalVariable>((*II)->stripPointerCasts()));
|
|
|
|
MMI.addFilterTypeInfo(MBB, FilterList);
|
|
}
|
|
}
|
|
}
|