Adam Nemet 8fb9cfe141 [SelectionDAG] Force cycle detection in AssignTopologicalOrder before aborting ... DAG cycle detection is only enabled with ENABLE_EXPENSIVE_CHECKS. However we can run it just before we would crash in order to provide more informative diagnostics. Now in addition to the "Overran sorted position" message we also get the Node printed if a cycle was detected. Tested by building several configs: Debug+Assert, Debug+Assert+Check (this is ENABLE_EXPENSIVE_CHECKS), Release+Assert and Release. Also tried that the AssignTopologicalOrder assert produces the expected results. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@209977 91177308-0d34-0410-b5e6-96231b3b80d8		2014-05-31 16:23:20 +00:00
..
Analysis	implement missing SCEVDivision case	2014-05-29 19:44:09 +00:00
AsmParser	[pr19844] Add thread local mode to aliases.	2014-05-28 18:15:43 +00:00
Bitcode	Use error_code() instead of error_code::succes()	2014-05-31 01:37:45 +00:00
CodeGen	[SelectionDAG] Force cycle detection in AssignTopologicalOrder before aborting	2014-05-31 16:23:20 +00:00
DebugInfo
ExecutionEngine	Use error_code() instead of error_code::succes()	2014-05-31 01:37:45 +00:00
IR	Use error_code() instead of error_code::succes()	2014-05-31 01:37:45 +00:00
IRReader
LineEditor
Linker
LTO	AArch64/ARM64: move ARM64 into AArch64's place	2014-05-24 12:50:23 +00:00
MC	Fix MIPS exception personality encoding.	2014-05-30 16:48:56 +00:00
Object	There is no std::errc::success, remove the llvm one.	2014-05-31 03:21:04 +00:00
Option
ProfileData	There is no std::errc::success, remove the llvm one.	2014-05-31 03:21:04 +00:00
Support	[yaml2obj] Add new command line option -docnum.	2014-05-31 04:51:07 +00:00
TableGen	Fix typos in tablegen error messages	2014-05-31 05:18:52 +00:00
Target	R600/SI: Fix [s|u]int_to_fp for i1	2014-05-31 06:47:42 +00:00
Transforms	[Reassociate] Similar to "X + -X" -> "0", added code to handle "X + ~X" -> "-1".	2014-05-31 15:01:54 +00:00
CMakeLists.txt
LLVMBuild.txt
Makefile