mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-16 11:30:51 +00:00
d50bcb2162
This patch adds support for the CRJ and CGRJ instructions. Support for the immediate forms will be a separate patch. The architecture has a large number of comparison instructions. I think it's generally better to concentrate on using the "best" comparison instruction first and foremost, then only use something like CRJ if CR really was the natual choice of comparison instruction. The patch therefore opportunistically converts separate CR and BRC instructions into a single CRJ while emitting instructions in ISelLowering. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@182764 91177308-0d34-0410-b5e6-96231b3b80d8
162 lines
4.3 KiB
LLVM
162 lines
4.3 KiB
LLVM
; Test 32-bit signed comparison in which the second operand is a variable.
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;
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; RUN: llc < %s -mtriple=s390x-linux-gnu | FileCheck %s
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; Check register comparison.
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define double @f1(double %a, double %b, i32 %i1, i32 %i2) {
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; CHECK: f1:
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; CHECK: crjl %r2, %r3
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%cond = icmp slt i32 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the low end of the C range.
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define double @f2(double %a, double %b, i32 %i1, i32 *%ptr) {
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; CHECK: f2:
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; CHECK: c %r2, 0(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%i2 = load i32 *%ptr
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%cond = icmp slt i32 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the high end of the aligned C range.
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define double @f3(double %a, double %b, i32 %i1, i32 *%base) {
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; CHECK: f3:
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; CHECK: c %r2, 4092(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 1023
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%i2 = load i32 *%ptr
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%cond = icmp slt i32 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next word up, which should use CY instead of C.
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define double @f4(double %a, double %b, i32 %i1, i32 *%base) {
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; CHECK: f4:
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; CHECK: cy %r2, 4096(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 1024
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%i2 = load i32 *%ptr
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%cond = icmp slt i32 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the high end of the aligned CY range.
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define double @f5(double %a, double %b, i32 %i1, i32 *%base) {
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; CHECK: f5:
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; CHECK: cy %r2, 524284(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 131071
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%i2 = load i32 *%ptr
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%cond = icmp slt i32 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next word up, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define double @f6(double %a, double %b, i32 %i1, i32 *%base) {
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; CHECK: f6:
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; CHECK: agfi %r3, 524288
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; CHECK: c %r2, 0(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 131072
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%i2 = load i32 *%ptr
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%cond = icmp slt i32 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the high end of the negative aligned CY range.
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define double @f7(double %a, double %b, i32 %i1, i32 *%base) {
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; CHECK: f7:
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; CHECK: cy %r2, -4(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 -1
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%i2 = load i32 *%ptr
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%cond = icmp slt i32 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the low end of the CY range.
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define double @f8(double %a, double %b, i32 %i1, i32 *%base) {
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; CHECK: f8:
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; CHECK: cy %r2, -524288(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 -131072
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%i2 = load i32 *%ptr
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%cond = icmp slt i32 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check the next word down, which needs separate address logic.
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; Other sequences besides this one would be OK.
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define double @f9(double %a, double %b, i32 %i1, i32 *%base) {
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; CHECK: f9:
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; CHECK: agfi %r3, -524292
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; CHECK: c %r2, 0(%r3)
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%ptr = getelementptr i32 *%base, i64 -131073
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%i2 = load i32 *%ptr
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%cond = icmp slt i32 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check that C allows an index.
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define double @f10(double %a, double %b, i32 %i1, i64 %base, i64 %index) {
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; CHECK: f10:
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; CHECK: c %r2, 4092({{%r4,%r3|%r3,%r4}})
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%add1 = add i64 %base, %index
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%add2 = add i64 %add1, 4092
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%ptr = inttoptr i64 %add2 to i32 *
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%i2 = load i32 *%ptr
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%cond = icmp slt i32 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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; Check that CY allows an index.
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define double @f11(double %a, double %b, i32 %i1, i64 %base, i64 %index) {
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; CHECK: f11:
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; CHECK: cy %r2, 4096({{%r4,%r3|%r3,%r4}})
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; CHECK-NEXT: jl
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; CHECK: ldr %f0, %f2
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; CHECK: br %r14
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%add1 = add i64 %base, %index
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%add2 = add i64 %add1, 4096
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%ptr = inttoptr i64 %add2 to i32 *
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%i2 = load i32 *%ptr
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%cond = icmp slt i32 %i1, %i2
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%res = select i1 %cond, double %a, double %b
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ret double %res
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}
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