Arnold Schwaighofer fb55a8fd7c ARM cost model: Address computation in vector mem ops not free ... Adds a function to target transform info to query for the cost of address computation. The cost model analysis pass now also queries this interface. The code in LoopVectorize adds the cost of address computation as part of the memory instruction cost calculation. Only there, we know whether the instruction will be scalarized or not. Increase the penality for inserting in to D registers on swift. This becomes necessary because we now always assume that address computation has a cost and three is a closer value to the architecture. radar://13097204 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@174713 91177308-0d34-0410-b5e6-96231b3b80d8		2013-02-08 14:50:48 +00:00
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arith.ll	Cost Model: change the default cost of control flow instructions (br / ret / ...) to zero.	2012-12-05 21:21:26 +00:00
cast.ll	Cost Model: change the default cost of control flow instructions (br / ret / ...) to zero.	2012-12-05 21:21:26 +00:00
cmp.ll	Reverse order of checking SSE level when calculating compare cost, so we check	2012-12-18 22:57:56 +00:00
gep.ll	ARM cost model: Address computation in vector mem ops not free	2013-02-08 14:50:48 +00:00
i32.ll	We are not ready to estimate the cost of integer expansions based on the number of parts. This test is too noisy.	2012-12-23 09:11:07 +00:00
insert-extract-at-zero.ll	Cost Model: Normalize the insert/extract index when splitting types	2012-11-05 21:12:13 +00:00
lit.local.cfg
load_store.ll	Improve the X86 cost model for loads and stores.	2012-12-21 01:33:59 +00:00
loop_v2.ll
tiny.ll	Cost Model: change the default cost of control flow instructions (br / ret / ...) to zero.	2012-12-05 21:21:26 +00:00
vectorized-loop.ll	Improve the X86 cost model for loads and stores.	2012-12-21 01:33:59 +00:00