mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-15 20:29:48 +00:00
18cba562c8
Changes to ARM unwind opcode assembler:
* Fix multiple .save or .vsave directives. Besides, the
order is preserved now.
* For the directives which will generate multiple opcodes,
such as ".save {r0-r11}", the order of the unwind opcode
is fixed now, i.e. the registers with less encoding value
are popped first.
* Fix the $sp offset calculation. Now, we can use the
.setfp, .pad, .save, and .vsave directives at any order.
Changes to test cases:
* Add test cases to check the order of multiple opcodes
for the .save directive.
* Fix the incorrect $sp offset in the test case. The
stack pointer offset specified in the test case was
incorrect. (Changed test cases: ehabi-mc-section.ll and
ehabi-mc.ll)
* The opcode to restore $sp are slightly reordered. The
behavior are not changed, and the new output is same
as the output of GNU as. (Changed test cases:
eh-directive-pad.s and eh-directive-setfp.s)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@183627 91177308-0d34-0410-b5e6-96231b3b80d8
227 lines
5.3 KiB
ArmAsm
227 lines
5.3 KiB
ArmAsm
@ RUN: llvm-mc %s -triple=armv7-unknown-linux-gnueabi -filetype=obj -o - \
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@ RUN: | llvm-readobj -s -sd | FileCheck %s
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@ Check for different stack pointer offsets.
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@ The .pad directive will track the stack pointer offsets. There are several
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@ ways to encode the stack offsets. We have to test:
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@
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@ offset < 0x00
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@ offset == 0x00
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@ 0x04 <= offset <= 0x100
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@ 0x104 <= offset <= 0x200
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@ 0x204 <= offset
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.syntax unified
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@-------------------------------------------------------------------------------
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@ TEST1
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@-------------------------------------------------------------------------------
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.section .TEST1
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.globl func1
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.align 2
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.type func1,%function
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.fnstart
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func1:
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.pad #0
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sub sp, sp, #0
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add sp, sp, #0
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bx lr
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.personality __gxx_personality_v0
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.handlerdata
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.fnend
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@-------------------------------------------------------------------------------
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@ The assembler should emit nothing (will be filled up with finish opcode).
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@-------------------------------------------------------------------------------
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@ CHECK: Section {
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@ CHECK: Name: .ARM.extab.TEST1
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@ CHECK: SectionData (
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@ CHECK: 0000: 00000000 B0B0B000 |........|
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@ CHECK: )
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@ CHECK: }
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@-------------------------------------------------------------------------------
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@ TEST2
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@-------------------------------------------------------------------------------
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.section .TEST2
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.globl func2a
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.align 2
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.type func2a,%function
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.fnstart
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func2a:
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.pad #0x4
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sub sp, sp, #0x4
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add sp, sp, #0x4
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bx lr
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.personality __gxx_personality_v0
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.handlerdata
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.fnend
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.globl func2b
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.align 2
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.type func2b,%function
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.fnstart
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func2b:
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.pad #0x100
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sub sp, sp, #0x100
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add sp, sp, #0x100
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bx lr
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.personality __gxx_personality_v0
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.handlerdata
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.fnend
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@-------------------------------------------------------------------------------
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@ The assembler should emit ((offset - 4) >> 2).
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@-------------------------------------------------------------------------------
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@ CHECK: Section {
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@ CHECK: Name: .ARM.extab.TEST2
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@ CHECK: SectionData (
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@ CHECK: 0000: 00000000 B0B00000 00000000 B0B03F00 |..............?.|
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@ CHECK: )
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@ CHECK: }
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@-------------------------------------------------------------------------------
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@ TEST3
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@-------------------------------------------------------------------------------
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.section .TEST3
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.globl func3a
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.align 2
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.type func3a,%function
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.fnstart
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func3a:
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.pad #0x104
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sub sp, sp, #0x104
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add sp, sp, #0x104
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bx lr
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.personality __gxx_personality_v0
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.handlerdata
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.fnend
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.globl func3b
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.align 2
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.type func3b,%function
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.fnstart
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func3b:
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.pad #0x200
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sub sp, sp, #0x200
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add sp, sp, #0x200
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bx lr
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.personality __gxx_personality_v0
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.handlerdata
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.fnend
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@-------------------------------------------------------------------------------
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@ The assembler should emit 0x3F and ((offset - 0x104) >> 2).
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@-------------------------------------------------------------------------------
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@ CHECK: Section {
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@ CHECK: Name: .ARM.extab.TEST3
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@ CHECK: SectionData (
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@ CHECK: 0000: 00000000 B03F0000 00000000 B03F3F00 |.....?.......??.|
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@ CHECK: )
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@ CHECK: }
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@-------------------------------------------------------------------------------
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@ TEST4
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@-------------------------------------------------------------------------------
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.section .TEST4
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.globl func4a
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.align 2
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.type func4a,%function
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.fnstart
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func4a:
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.pad #0x204
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sub sp, sp, #0x204
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add sp, sp, #0x204
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bx lr
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.personality __gxx_personality_v0
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.handlerdata
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.fnend
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.globl func4b
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.align 2
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.type func4b,%function
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.fnstart
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func4b:
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.pad #0x580
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sub sp, sp, #0x580
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add sp, sp, #0x580
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bx lr
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.personality __gxx_personality_v0
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.handlerdata
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.fnend
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@-------------------------------------------------------------------------------
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@ The assembler should emit 0xB2 and the ULEB128 encoding of
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@ ((offset - 0x204) >> 2).
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@-------------------------------------------------------------------------------
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@ CHECK: Section {
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@ CHECK: Name: .ARM.extab.TEST4
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@ CHECK: SectionData (
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@ CHECK: 0000: 00000000 B000B200 00000000 01DFB200 |................|
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@ CHECK: )
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@ CHECK: }
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@-------------------------------------------------------------------------------
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@ TEST5
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@-------------------------------------------------------------------------------
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.section .TEST5
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.globl func4a
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.align 2
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.type func4a,%function
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.fnstart
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func5a:
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.pad #-0x4
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add sp, sp, #0x4
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sub sp, sp, #0x4
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bx lr
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.personality __gxx_personality_v0
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.handlerdata
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.fnend
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.globl func5b
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.align 2
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.type func5b,%function
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.fnstart
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func5b:
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.pad #-0x104
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add sp, sp, #0x104
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sub sp, sp, #0x4
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bx lr
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.personality __gxx_personality_v0
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.handlerdata
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.fnend
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.globl func5c
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.align 2
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.type func5c,%function
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.fnstart
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func5c:
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.pad #-0x204
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add sp, sp, #0x204
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sub sp, sp, #0x4
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bx lr
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.personality __gxx_personality_v0
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.handlerdata
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.fnend
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@-------------------------------------------------------------------------------
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@ The assembler should emit (0x40 | (-offset - 4)) >> 2. When (-offset - 4)
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@ is greater than 0x3f, then multiple 0x7f should be emitted.
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@-------------------------------------------------------------------------------
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@ CHECK: Section {
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@ CHECK: Name: .ARM.extab.TEST5
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@ CHECK: SectionData (
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@ CHECK: 0000: 00000000 B0B04000 00000000 B07F4000 |......@.......@.|
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@ CHECK: 0010: 00000000 7F7F4000 |......@.|
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@ CHECK: )
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@ CHECK: }
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