mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-12-19 01:34:32 +00:00
1c10b8de46
This allows us to compile "unsigned foo(unsigned x) { return x/28; }" into
shrl $2, %edi
imulq $613566757, %rdi, %rax
shrq $32, %rax
ret
instead of
movl %edi, %eax
imulq $613566757, %rax, %rcx
shrq $32, %rcx
subl %ecx, %eax
shrl %eax
addl %ecx, %eax
shrl $4, %eax
on x86_64
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@127829 91177308-0d34-0410-b5e6-96231b3b80d8
74 lines
1.7 KiB
LLVM
74 lines
1.7 KiB
LLVM
; RUN: llc < %s -mtriple=i686-pc-linux-gnu -asm-verbose=0 | FileCheck %s
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target datalayout = "e-p:32:32:32-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:32:64-f32:32:32-f64:32:64-v64:64:64-v128:128:128-a0:0:64-f80:32:32"
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target triple = "i686-pc-linux-gnu"
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define zeroext i16 @test1(i16 zeroext %x) nounwind {
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entry:
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%div = udiv i16 %x, 33
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ret i16 %div
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; CHECK: test1:
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; CHECK: imull $63551, %eax, %eax
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; CHECK-NEXT: shrl $21, %eax
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; CHECK-NEXT: ret
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}
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define zeroext i16 @test2(i8 signext %x, i16 zeroext %c) nounwind readnone ssp noredzone {
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entry:
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%div = udiv i16 %c, 3
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ret i16 %div
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; CHECK: test2:
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; CHECK: imull $43691, %eax, %eax
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; CHECK-NEXT: shrl $17, %eax
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; CHECK-NEXT: ret
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}
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define zeroext i8 @test3(i8 zeroext %x, i8 zeroext %c) nounwind readnone ssp noredzone {
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entry:
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%div = udiv i8 %c, 3
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ret i8 %div
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; CHECK: test3:
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; CHECK: movzbl 8(%esp), %eax
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; CHECK-NEXT: imull $171, %eax, %eax
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; CHECK-NEXT: shrl $9, %eax
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; CHECK-NEXT: ret
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}
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define signext i16 @test4(i16 signext %x) nounwind {
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entry:
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%div = sdiv i16 %x, 33 ; <i32> [#uses=1]
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ret i16 %div
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; CHECK: test4:
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; CHECK: imull $1986, %eax, %eax
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}
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define i32 @test5(i32 %A) nounwind {
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%tmp1 = udiv i32 %A, 1577682821 ; <i32> [#uses=1]
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ret i32 %tmp1
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; CHECK: test5:
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; CHECK: movl $365384439, %eax
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; CHECK: mull 4(%esp)
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}
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define signext i16 @test6(i16 signext %x) nounwind {
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entry:
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%div = sdiv i16 %x, 10
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ret i16 %div
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; CHECK: test6:
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; CHECK: imull $26215, %eax, %eax
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; CHECK: shrl $31, %ecx
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; CHECK: sarl $18, %eax
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}
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define i32 @test7(i32 %x) nounwind {
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%div = udiv i32 %x, 28
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ret i32 %div
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; CHECK: test7:
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; CHECK: shrl $2
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; CHECK: movl $613566757
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; CHECK: mull
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; CHECK-NOT: shrl
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; CHECK: ret
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}
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