mirror of
https://github.com/c64scene-ar/llvm-6502.git
synced 2024-08-28 06:29:45 +00:00
the only real caller (GetFunctionSizeInBytes) uses it. The custom ARM implementation of this is basically reimplementing an assembler poorly for negligible gain. It should be removed IMNSHO, but I'll leave that to ARMish folks to decide. git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@77877 91177308-0d34-0410-b5e6-96231b3b80d8
56 lines
1.8 KiB
C++
56 lines
1.8 KiB
C++
//===- ARMInstrInfo.h - ARM Instruction Information -------------*- C++ -*-===//
|
|
//
|
|
// The LLVM Compiler Infrastructure
|
|
//
|
|
// This file is distributed under the University of Illinois Open Source
|
|
// License. See LICENSE.TXT for details.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
//
|
|
// This file contains the ARM implementation of the TargetInstrInfo class.
|
|
//
|
|
//===----------------------------------------------------------------------===//
|
|
|
|
#ifndef ARMINSTRUCTIONINFO_H
|
|
#define ARMINSTRUCTIONINFO_H
|
|
|
|
#include "llvm/Target/TargetInstrInfo.h"
|
|
#include "ARMBaseInstrInfo.h"
|
|
#include "ARMRegisterInfo.h"
|
|
#include "ARMSubtarget.h"
|
|
#include "ARM.h"
|
|
|
|
namespace llvm {
|
|
class ARMSubtarget;
|
|
|
|
class ARMInstrInfo : public ARMBaseInstrInfo {
|
|
ARMRegisterInfo RI;
|
|
const ARMSubtarget &Subtarget;
|
|
public:
|
|
explicit ARMInstrInfo(const ARMSubtarget &STI);
|
|
|
|
// Return the non-pre/post incrementing version of 'Opc'. Return 0
|
|
// if there is not such an opcode.
|
|
unsigned getUnindexedOpcode(unsigned Opc) const;
|
|
|
|
// Return true if the block does not fall through.
|
|
bool BlockHasNoFallThrough(const MachineBasicBlock &MBB) const;
|
|
|
|
/// getRegisterInfo - TargetInstrInfo is a superset of MRegister info. As
|
|
/// such, whenever a client has an instance of instruction info, it should
|
|
/// always be able to get register info as well (through this method).
|
|
///
|
|
const ARMRegisterInfo &getRegisterInfo() const { return RI; }
|
|
|
|
void reMaterialize(MachineBasicBlock &MBB, MachineBasicBlock::iterator MI,
|
|
unsigned DestReg, unsigned SubIdx,
|
|
const MachineInstr *Orig) const;
|
|
|
|
virtual unsigned getInlineAsmLength(const char *Str,
|
|
const TargetAsmInfo &TAI) const;
|
|
};
|
|
|
|
}
|
|
|
|
#endif
|