Evan Cheng 9085f98b32 t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoist more loads during machine LICM. ... git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@104115 91177308-0d34-0410-b5e6-96231b3b80d8		2010-05-19 07:28:01 +00:00
..
Alpha
ARM	Intrinsics which do a vector compare (results are all zero or all ones) are modeled as icmp / fcmp + sext. This is turned into a vsetcc by dag combine (yes, not a good long term solution). The targets can then isel the vsetcc to the appropriate instruction.	2010-05-19 01:08:17 +00:00
Blackfin
CBackend
CellSPU	Make SPU backend not assert on jump tables.	2010-05-11 11:00:02 +00:00
CPP
Generic	Enable a bunch more -regalloc=fast tests	2010-05-12 00:11:24 +00:00
MBlaze
Mips
MSP430
PIC16
PowerPC	Only use clairvoyance when defining a register, and then only if it has one use.	2010-05-17 04:50:57 +00:00
SPARC
SystemZ	SystemZ really does mean "has calls" and not just "adjusts stack." Go ahead and	2010-05-14 22:17:42 +00:00
Thumb	Enable a bunch more -regalloc=fast tests	2010-05-12 00:11:24 +00:00
Thumb2	t2LEApcrel and tLEApcrel are re-materializable. This makes it possible to hoist more loads during machine LICM.	2010-05-19 07:28:01 +00:00
X86	When converting a test to a cmp to fold a load, use the cmp that has an	2010-05-18 21:42:03 +00:00
XCore