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909a0e0e95
In my previous commit: "Merge a f32 bitcast of a v2i32 extractelt A vectorized sitfp on doubles will get scalarized to a sequence of an extract_element of <2 x i32>, a bitcast to f32 and a sitofp. Due to the the extract_element, and the bitcast we will uneccessarily generate moves between scalar and vector registers." I added a pattern containing a copy_to_regclass. The copy_to_regclass is actually not needed. radar://13191881 git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@175555 91177308-0d34-0410-b5e6-96231b3b80d8
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